Triple

T7032667
Position Surface form Disambiguated ID Type / Status
Subject Airmont E163306 entity
Predicate supportsInstructionSetExtension P203 FINISHED
Object SSE4.1
SSE4.1 is an Intel SIMD instruction set extension that adds advanced vector, integer, and floating-point operations to improve performance in multimedia, graphics, and data-processing applications.
E637388 NE FINISHED

How this triple was built (5 steps)

Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.

NER Named-entity recognition gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: SSE4.1 | Statement: [Airmont, supportsInstructionSetExtension, SSE4.1]
NED1 Entity disambiguation (via context triple) gpt-5-mini-2025-08-07
Target entity: SSE4.1
Context triple: [Airmont, supportsInstructionSetExtension, SSE4.1]
  • A. SSE3
    SSE3 (Streaming SIMD Extensions 3) is an Intel CPU instruction set extension that adds additional SIMD operations to improve performance in multimedia, gaming, and scientific applications.
  • B. SSE2
    SSE2 is an x86 processor instruction set extension introduced by Intel that adds advanced SIMD (Single Instruction, Multiple Data) capabilities for faster floating-point and integer computations.
  • C. Intel SSE
    Intel SSE is a set of SIMD (Single Instruction, Multiple Data) instruction extensions for x86 processors designed to accelerate multimedia, gaming, and scientific applications through parallel data processing.
  • D. SSSE3
    SSSE3 (Supplemental Streaming SIMD Extensions 3) is an Intel SIMD instruction set extension that enhances performance for multimedia, signal processing, and other parallelizable workloads.
  • E. Intel AVX
    Intel AVX is an x86 processor instruction set extension from Intel that accelerates floating-point and vector-intensive workloads, commonly used in high-performance computing, multimedia, and scientific applications.
  • F. None of above. chosen
  • G. Unsure - the case is ambiguous/there is not enough information to decide.
NEDg Description generation gpt-5.1
Instruction
Generate a one-sentence description of the target entity. 
You are given a context triple in the form (subject, predicate, object), where the object is the target entity. 
# Instructions
Use the triple to infer relevant information about the entity. Describe the entity based on what is most defining, well-known. 
Avoid repeating the information from the triple, unless really essential.
# Response Format
Return only the sentence: "Description: [one-sentence description of the target entity]"
Input
Entity: SSE4.1
Triple: [Airmont, supportsInstructionSetExtension, SSE4.1]
Generated description
SSE4.1 is an Intel SIMD instruction set extension that adds advanced vector, integer, and floating-point operations to improve performance in multimedia, graphics, and data-processing applications.
NED2 Entity disambiguation (via description) gpt-5-mini-2025-08-07
Target entity: SSE4.1
Target entity description: SSE4.1 is an Intel SIMD instruction set extension that adds advanced vector, integer, and floating-point operations to improve performance in multimedia, graphics, and data-processing applications.
  • A. SSE3
    SSE3 (Streaming SIMD Extensions 3) is an Intel CPU instruction set extension that adds additional SIMD operations to improve performance in multimedia, gaming, and scientific applications.
  • B. SSE2
    SSE2 is an x86 processor instruction set extension introduced by Intel that adds advanced SIMD (Single Instruction, Multiple Data) capabilities for faster floating-point and integer computations.
  • C. Intel SSE
    Intel SSE is a set of SIMD (Single Instruction, Multiple Data) instruction extensions for x86 processors designed to accelerate multimedia, gaming, and scientific applications through parallel data processing.
  • D. SSSE3
    SSSE3 (Supplemental Streaming SIMD Extensions 3) is an Intel SIMD instruction set extension that enhances performance for multimedia, signal processing, and other parallelizable workloads.
  • E. Intel AVX
    Intel AVX is an x86 processor instruction set extension from Intel that accelerates floating-point and vector-intensive workloads, commonly used in high-performance computing, multimedia, and scientific applications.
  • F. None of above. chosen
PD Predicate disambiguation gpt-5-mini-2025-08-07
Target predicate: supportsInstructionSetExtension
Context triple: [Airmont, supportsInstructionSetExtension, SSE4.1]
  • A. supportsExtensionsFrom
    Indicates that one entity is capable of recognizing, loading, or interoperating with extensions originating from another entity.
  • B. supportsFeature chosen
    Indicates that one entity provides, enables, or is compatible with a particular feature or capability of another.
  • C. laterSupportedArchitecture
    Indicates that one architecture provides support for another architecture that was introduced or adopted at a later time.
  • D. isSupportedBy
    Indicates that an entity is upheld, sustained, or enabled by another entity, which provides necessary assistance, resources, or justification.
  • E. supportedInstrument
    Indicates that an entity provides compatibility with, or operational support for, a specified instrument.
  • F. None of above.

Provenance (6 batches)

The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.

Step Stage Batch ID Status When
creating Elicitation batch_69c6885d691c81908cf7d31083113886 completed March 27, 2026, 1:38 p.m.
NER Named-entity recognition batch_69c6e458ad9c81908c3f492b317ce291 completed March 27, 2026, 8:11 p.m.
NED1 Entity disambiguation (via context triple) batch_69c775980920819081d31b8d2843fb3d completed March 28, 2026, 6:30 a.m.
NEDg Description generation batch_69c77aa1c704819088a9561ac55f9037 completed March 28, 2026, 6:52 a.m.
NED2 Entity disambiguation (via description) batch_69c77b082f3c8190a649297ce0f816bb completed March 28, 2026, 6:54 a.m.
PD Predicate disambiguation batch_69c6e1b9a2488190aea351d96afa5a12 completed March 27, 2026, 7:59 p.m.
Created at: March 27, 2026, 2:36 p.m.