Triple
T6961637
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | Intel Core Solo |
E161382
|
entity |
| Predicate | instanceOf |
P0
|
FINISHED |
| Object | microprocessor family |
C3600
|
CONCEPT FINISHED |
Provenance (1 batch)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69c68853cff881908439d488924a8283 |
completed | March 27, 2026, 1:38 p.m. |
Created at: March 27, 2026, 2:30 p.m.