Triple

T658064
Position Surface form Disambiguated ID Type / Status
Subject iBook E11691 entity
Predicate cpuArchitecture P8609 FINISHED
Object PowerPC E6429 NE FINISHED

How this triple was built (2 steps)

Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.

NER Named-entity recognition gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: PowerPC | Statement: [iBook, cpuArchitecture, PowerPC]
NED1 Entity disambiguation (via context triple) gpt-5-mini-2025-08-07
Target entity: PowerPC
Context triple: [iBook, cpuArchitecture, PowerPC]
  • A. PowerPC chosen
    PowerPC is a RISC-based microprocessor architecture developed in the early 1990s by the AIM alliance (Apple, IBM, and Motorola) and used in a wide range of computers, embedded systems, and game consoles.
  • B. AltiVec
    AltiVec is a vector processing extension for the PowerPC architecture that accelerates multimedia, signal processing, and other parallelizable computations.
  • C. Motorola 68000 family
    The Motorola 68000 family is a line of 16/32-bit CISC microprocessors widely used in early personal computers, workstations, and game consoles during the 1980s and early 1990s.
  • D. Motorola 88000 family
    The Motorola 88000 family is a RISC-based microprocessor line developed by Motorola as a high-performance follow-up to its earlier 68000 series, aimed primarily at workstations and embedded systems.
  • E. SPARCstation
    SPARCstation is a family of UNIX workstations developed by Sun Microsystems in the late 1980s and 1990s, based on the SPARC RISC architecture and widely used in engineering and academic environments.
  • F. None of above.
  • G. Unsure - the case is ambiguous/there is not enough information to decide.

Provenance (3 batches)

The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.

Step Stage Batch ID Status When
creating Elicitation batch_69a4932862a0819098be659c814e4981 completed March 1, 2026, 7:27 p.m.
NER Named-entity recognition batch_69a49fa55e048190bd9913c6c31772d0 completed March 1, 2026, 8:20 p.m.
NED1 Entity disambiguation (via context triple) batch_69a5c39453208190928b61ad090e7e23 completed March 2, 2026, 5:06 p.m.
Created at: March 1, 2026, 7:36 p.m.