Triple

T3996865
Position Surface form Disambiguated ID Type / Status
Subject PowerPC G4 E87118 entity
Predicate hasExtension P455 FINISHED
Object AltiVec vector processing unit E41460 NE FINISHED

How this triple was built (2 steps)

Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.

NER Named-entity recognition gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: AltiVec vector processing unit | Statement: [PowerPC G4, hasExtension, AltiVec vector processing unit]
NED1 Entity disambiguation (via context triple) gpt-5-mini-2025-08-07
Target entity: AltiVec vector processing unit
Context triple: [PowerPC G4, hasExtension, AltiVec vector processing unit]
  • A. AltiVec chosen
    AltiVec is a vector processing extension for the PowerPC architecture that accelerates multimedia, signal processing, and other parallelizable computations.
  • B. SPARC microprocessor architecture
    The SPARC microprocessor architecture is a RISC-based instruction set architecture widely used in high-performance and enterprise servers, originally created to power scalable, multi-processor systems.
  • C. QorIQ communications processors
    QorIQ communications processors are a family of high-performance, power-efficient multicore system-on-chip devices designed for networking, telecommunications, and embedded communications applications.
  • D. Motorola 68851
    The Motorola 68851 is an external paged memory management unit (MMU) designed to work with Motorola 68020 processors, providing advanced virtual memory and protection features.
  • E. PowerPC
    PowerPC is a RISC-based microprocessor architecture developed in the early 1990s by the AIM alliance (Apple, IBM, and Motorola) and used in a wide range of computers, embedded systems, and game consoles.
  • F. None of above.
  • G. Unsure - the case is ambiguous/there is not enough information to decide.

Provenance (3 batches)

The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.

Step Stage Batch ID Status When
creating Elicitation batch_69aed94118148190975e6aa4e554cde9 completed March 9, 2026, 2:29 p.m.
NER Named-entity recognition batch_69aefa228d608190b936a86c98c92ef2 completed March 9, 2026, 4:49 p.m.
NED1 Entity disambiguation (via context triple) batch_69b5562139b481909faba39f4f36cd26 completed March 14, 2026, 12:35 p.m.
Created at: March 9, 2026, 3:34 p.m.