Triple
T3996851
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | PowerPC G4 |
E87118
|
entity |
| Predicate | feature |
P374
|
FINISHED |
| Object | AltiVec |
E41460
|
NE FINISHED |
How this triple was built (2 steps)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
NER
Named-entity recognition
gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: AltiVec | Statement: [PowerPC G4, feature, AltiVec]
NED1
Entity disambiguation (via context triple)
gpt-5-mini-2025-08-07
Target entity: AltiVec Context triple: [PowerPC G4, feature, AltiVec]
-
A.
AltiVec
chosen
AltiVec is a vector processing extension for the PowerPC architecture that accelerates multimedia, signal processing, and other parallelizable computations.
-
B.
PowerPC
PowerPC is a RISC-based microprocessor architecture developed in the early 1990s by the AIM alliance (Apple, IBM, and Motorola) and used in a wide range of computers, embedded systems, and game consoles.
-
C.
PowerPC 604
PowerPC 604 is a 32-bit RISC microprocessor from IBM and Motorola’s PowerPC family, widely used in mid-1990s Apple Power Macintosh systems for its strong integer and floating-point performance.
-
D.
Hitachi SH-4
The Hitachi SH-4 is a 32-bit RISC microprocessor known for its use in late-1990s gaming consoles and embedded systems, featuring strong floating-point performance for 3D graphics.
-
E.
Motorola 68851
The Motorola 68851 is an external paged memory management unit (MMU) designed to work with Motorola 68020 processors, providing advanced virtual memory and protection features.
- F. None of above.
- G. Unsure - the case is ambiguous/there is not enough information to decide.
Provenance (3 batches)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69aed94118148190975e6aa4e554cde9 |
completed | March 9, 2026, 2:29 p.m. |
| NER | Named-entity recognition | batch_69aefa228d608190b936a86c98c92ef2 |
completed | March 9, 2026, 4:49 p.m. |
| NED1 | Entity disambiguation (via context triple) | batch_69b54c54f05c8190b18c2d4839a61b64 |
completed | March 14, 2026, 11:53 a.m. |
Created at: March 9, 2026, 3:34 p.m.