Triple

T3724803
Position Surface form Disambiguated ID Type / Status
Subject Signetics E81722 entity
Predicate notablePublication P4 FINISHED
Object Signetics Digital Data Manual E81722 NE FINISHED

How this triple was built (2 steps)

Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.

NER Named-entity recognition gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: Signetics Digital Data Manual | Statement: [Signetics, notablePublication, Signetics Digital Data Manual]
NED1 Entity disambiguation (via context triple) gpt-5-mini-2025-08-07
Target entity: Signetics Digital Data Manual
Context triple: [Signetics, notablePublication, Signetics Digital Data Manual]
  • A. Signetics chosen
    Signetics was an early integrated circuit and semiconductor manufacturer that became known for pioneering memory and logic chips before being acquired by Philips.
  • B. Motorola 6800 microprocessor
    The Motorola 6800 microprocessor is an 8-bit CPU introduced in the mid-1970s that became influential in early microcomputer and embedded system designs.
  • C. RCA 1802 microprocessor
    The RCA 1802 microprocessor is an early CMOS-based 8-bit CPU notable for its low power consumption, radiation hardness, and use in spacecraft and embedded systems in the 1970s and 1980s.
  • D. Intel 4001 ROM
    The Intel 4001 ROM is a 256-byte mask-programmable read-only memory chip with 4-bit I/O ports, designed as part of Intel’s original MCS-4 microprocessor family to store program code for the 4004 CPU.
  • E. S-100 bus computers
    S-100 bus computers are early microcomputer systems built around the S-100 expansion bus standard, widely used in the late 1970s and early 1980s for hobbyist and professional computing.
  • F. None of above.
  • G. Unsure - the case is ambiguous/there is not enough information to decide.

Provenance (3 batches)

The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.

Step Stage Batch ID Status When
creating Elicitation batch_69ad8b1b7ef081908d2d381bbf54985a completed March 8, 2026, 2:43 p.m.
NER Named-entity recognition batch_69adcaf54af881908bd8d520595de061 completed March 8, 2026, 7:16 p.m.
NED1 Entity disambiguation (via context triple) batch_69b4db0e40b08190abacdda42dbde411 completed March 14, 2026, 3:50 a.m.
Created at: March 8, 2026, 3:34 p.m.