Triple
T31632328
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | NVIDIA GeForce RTX 4090 |
E807201
|
entity |
| Predicate | memoryBandwidthGBps |
P13752
|
FINISHED |
| Object | 1008 |
—
|
LITERAL FINISHED |
How this triple was built (2 steps)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
NER
Named-entity recognition
gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: 1008 | Statement: [NVIDIA GeForce RTX 4090, memoryBandwidthGBps, 1008]
PD
Predicate disambiguation
gpt-5-mini-2025-08-07
Target predicate: memoryBandwidthGBps Context triple: [NVIDIA GeForce RTX 4090, memoryBandwidthGBps, 1008]
-
A.
memoryBandwidth
chosen
Indicates the rate at which data can be transferred to or from a memory system over a given period of time.
-
B.
ramSpeedMHz
Indicates the operating speed of a RAM module measured in megahertz (MHz).
-
C.
supportsMemoryBusWidth
Indicates that one entity is compatible with or able to operate using the specified memory bus width of another entity.
-
D.
ramSpeed
Indicates the rate or velocity at which one entity forcefully collides with or rams into another.
-
E.
memoryBusWidthBits
Indicates the width, in bits, of the data path used by the memory bus to transfer information.
- F. None of above.
Provenance (3 batches)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69f348d892948190915f8facacb9568c |
completed | April 30, 2026, 12:19 p.m. |
| NER | Named-entity recognition | batch_69f7117e55908190a67105e92bc4830f |
completed | May 3, 2026, 9:12 a.m. |
| PD | Predicate disambiguation | batch_69f70f380690819090cc34763ba460ed |
completed | May 3, 2026, 9:02 a.m. |
Created at: April 30, 2026, 10:45 p.m.