Triple
T29784077
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | Harvard Mark IV |
E756212
|
entity |
| Predicate | instanceOf |
P0
|
FINISHED |
| Object | Harvard Mark series computer |
C38665
|
CONCEPT FINISHED |
How this triple was built (1 step)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
CD
Concept disambiguation
gpt-5-mini-2025-08-07
Target class: Harvard Mark series computer Context triple: [Harvard Mark IV, instanceOf, Harvard Mark series computer]
-
A.
PDP series computer
A PDP series computer is a family of minicomputers produced by Digital Equipment Corporation (DEC) from the 1960s to 1980s, known for their relatively low cost, interactive use, and significant influence on computer architecture and operating systems.
-
B.
S-100 bus computer
An S-100 bus computer is a microcomputer system built around the S-100 expansion bus standard, using a backplane and plug-in cards for CPU, memory, and I/O to create a modular, expandable architecture.
-
C.
electromechanical computer
chosen
An electromechanical computer is a computing device that performs calculations using a combination of electrical circuits and mechanically moving components such as relays, switches, or rotating shafts.
-
D.
electronic stored-program computer
An electronic stored-program computer is a digital machine that executes instructions and processes data by electronically manipulating binary information according to programs held in its memory.
-
E.
mainframe computer series
A mainframe computer series is a family of high-performance, large-scale computers designed for reliable, centralized processing of massive workloads and critical enterprise applications over multiple generations.
- F. None of above.
Provenance (1 batch)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69f22451fb748190bbdbab401280affb |
completed | April 29, 2026, 3:31 p.m. |
Created at: April 29, 2026, 5:07 p.m.