Triple
T29390286
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | microSD |
E745353
|
entity |
| Predicate | instanceOf |
P0
|
FINISHED |
| Object | Secure Digital family form factor |
C55739
|
CONCEPT FINISHED |
How this triple was built (1 step)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
CD
Concept disambiguation
gpt-5-mini-2025-08-07
Target class: Secure Digital family form factor Context triple: [microSD, instanceOf, Secure Digital family form factor]
-
A.
security chip
A security chip is a dedicated hardware component designed to securely store cryptographic keys and perform sensitive operations to protect devices and data from unauthorized access and tampering.
-
B.
Wi‑Fi security certification program
A Wi‑Fi security certification program is a formal framework that evaluates, validates, and labels wireless networks and devices against defined security standards to ensure safe and trustworthy Wi‑Fi usage.
-
C.
cryptographic parameter set family
A cryptographic parameter set family is a collection of related parameter sets, typically varying in size or security level, that define the mathematical and operational settings for a class of cryptographic algorithms.
-
D.
hardware-based security technology
Hardware-based security technology refers to dedicated physical components and devices designed to protect systems and data by enforcing security functions at the hardware level, independent of or in conjunction with software controls.
-
E.
cryptographic scheme family
A cryptographic scheme family is a parameterized collection of related cryptographic schemes (e.g., keyed by security parameter or algorithm variant) that share a common structure and security goals while differing in specific instantiations or parameters.
- F. None of above. chosen
Provenance (1 batch)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69f0a79dfabc81908755382ee47791e2 |
completed | April 28, 2026, 12:27 p.m. |
Created at: April 28, 2026, 2:41 p.m.