Triple
T28246315
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | Intel Core i7-8500Y |
E712177
|
entity |
| Predicate | l3CacheType |
P109514
|
FINISHED |
| Object | Intel Smart Cache |
—
|
NE NERFINISHED |
How this triple was built (2 steps)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
NER
Named-entity recognition
gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: Intel Smart Cache | Statement: [Intel Core i7-8500Y, l3CacheType, Intel Smart Cache]
PD
Predicate disambiguation
gpt-5-mini-2025-08-07
Target predicate: l3CacheType Context triple: [Intel Core i7-8500Y, l3CacheType, Intel Smart Cache]
-
A.
l3CacheSize
Indicates the size or capacity of an entity’s level-3 (L3) cache memory.
-
B.
l2CacheType
Indicates the specific configuration or design category of an entity’s level-2 (L2) cache in a memory hierarchy.
-
C.
L1CacheType
Indicates the specific configuration or design category of a system’s Level 1 cache in relation to how it stores and accesses data or instructions.
-
D.
hasL3Cache
chosen
Indicates that an entity possesses or is equipped with a level-3 (L3) cache in a hardware or system architecture context.
-
E.
L2CacheCharacteristic
Indicates characteristics or properties associated with a level-2 (L2) cache in a computing system.
- F. None of above.
Provenance (3 batches)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69efb51fb98881909692421959ec0170 |
completed | April 27, 2026, 7:12 p.m. |
| NER | Named-entity recognition | batch_69f643c95d8881908513f34fd6a0216e |
completed | May 2, 2026, 6:34 p.m. |
| PD | Predicate disambiguation | batch_69f63c6c1a948190b68c0f92c264cc0c |
completed | May 2, 2026, 6:03 p.m. |
Created at: April 27, 2026, 11:01 p.m.