Triple
T26105197
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | SSE4.2 |
E658517
|
entity |
| Predicate | cpuidBit |
P159496
|
FINISHED |
| Object | ECX bit 20 |
—
|
LITERAL FINISHED |
How this triple was built (2 steps)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
NER
Named-entity recognition
gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: ECX bit 20 | Statement: [SSE4.2, cpuidBit, ECX bit 20]
PD
Predicate disambiguation
gpt-5-mini-2025-08-07
Target predicate: cpuidBit Context triple: [SSE4.2, cpuidBit, ECX bit 20]
-
A.
cpuidRegisterBit
chosen
Indicates that a specific bit within a given CPU ID (CPUID) register has a particular state or property relevant to the processor’s capabilities or features.
-
B.
cpuidLeaf
Indicates the specific CPUID instruction leaf or subfunction being referenced in a processor identification query.
-
C.
cpuBits
Indicates the number of bits used by a CPU’s architecture or word size in the described context.
-
D.
firstSupportedCPUFamily
Indicates the earliest CPU family that a system, software, or feature is designed to support or is compatible with.
-
E.
supportsIntel64
Indicates that one entity provides compatibility with or operational support for Intel 64-bit (x86-64) architecture in relation to another entity.
- F. None of above.
Provenance (3 batches)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69ee5bc09c288190bc42a11972841383 |
completed | April 26, 2026, 6:38 p.m. |
| NER | Named-entity recognition | batch_69f60775b298819095c64aca6806d61c |
completed | May 2, 2026, 2:17 p.m. |
| PD | Predicate disambiguation | batch_69f602d07590819085ac34b189613104 |
completed | May 2, 2026, 1:57 p.m. |
Created at: April 26, 2026, 7:58 p.m.