Triple
T26007144
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | Barton |
E646790
|
entity |
| Predicate | instanceOf |
P0
|
FINISHED |
| Object | AMD microarchitecture codename |
C25025
|
CONCEPT FINISHED |
How this triple was built (1 step)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
CD
Concept disambiguation
gpt-5-mini-2025-08-07
Target class: AMD microarchitecture codename Context triple: [Barton, instanceOf, AMD microarchitecture codename]
-
A.
Intel codename
An Intel codename is an internal, often thematic or location-based name used by Intel to identify and reference a specific processor, platform, or technology project before and sometimes alongside its official product branding.
-
B.
computer codename
chosen
A computer codename is a unique, often thematic or symbolic label used internally to identify a specific hardware or software project, version, or configuration before its official public name is assigned.
-
C.
Intel platform brand
An Intel platform brand represents a family of Intel-based hardware and software technologies marketed together to deliver a defined level of performance, features, and user experience for specific computing segments.
-
D.
Nintendo codename
A Nintendo codename is an internal, often secret project name used by Nintendo to refer to unreleased or in-development hardware, software, or services before their official titles are announced.
-
E.
Microsoft internal codename
A Microsoft internal codename is a temporary, often non-descriptive name used within the company to refer to a product, feature, or project before its official public name is finalized and announced.
- F. None of above.
Provenance (1 batch)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69e77e89d5848190b54352cdb74f6029 |
completed | April 21, 2026, 1:41 p.m. |
Created at: April 22, 2026, 9:01 a.m.