Triple
T25741634
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | FMA3 |
E648231
|
entity |
| Predicate | cpuidRegisterBit |
P159496
|
FINISHED |
| Object | ECX bit 12 |
—
|
LITERAL FINISHED |
How this triple was built (2 steps)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
NER
Named-entity recognition
gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: ECX bit 12 | Statement: [FMA3, cpuidRegisterBit, ECX bit 12]
PD
Predicate disambiguation
gpt-5-mini-2025-08-07
Target predicate: cpuidRegisterBit Context triple: [FMA3, cpuidRegisterBit, ECX bit 12]
-
A.
cpuidLeaf
Indicates the specific CPUID instruction leaf or subfunction being referenced in a processor identification query.
-
B.
cpuBits
Indicates the number of bits used by a CPU’s architecture or word size in the described context.
-
C.
supportsIntel64
Indicates that one entity provides compatibility with or operational support for Intel 64-bit (x86-64) architecture in relation to another entity.
-
D.
firstSupportedCPUFamily
Indicates the earliest CPU family that a system, software, or feature is designed to support or is compatible with.
-
E.
supportsIntelAES-NI
Indicates that one entity provides or is compatible with Intel AES-NI hardware acceleration support for AES encryption operations.
- F. None of above. chosen
Provenance (4 batches)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69e7ab306eec8190b05c312c6ab186b8 |
completed | April 21, 2026, 4:52 p.m. |
| NER | Named-entity recognition | batch_69f5fd1b3010819098da2e7d46dfc326 |
completed | May 2, 2026, 1:33 p.m. |
| PD | Predicate disambiguation | batch_69f4a0fed15881909b789251fe5d8d45 |
completed | May 1, 2026, 12:47 p.m. |
| PDg | Predicate description generation | batch_69f55e497fa081909bc59a7b92c5df59 |
completed | May 2, 2026, 2:15 a.m. |
Created at: April 22, 2026, 3:45 a.m.