Triple
T24561579
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | Honeywell Level 6 series |
E607668
|
entity |
| Predicate | instanceOf |
P0
|
FINISHED |
| Object | minicomputer family |
C23107
|
CONCEPT FINISHED |
How this triple was built (1 step)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
CD
Concept disambiguation
gpt-5-mini-2025-08-07
Target class: minicomputer family Context triple: [Honeywell Level 6 series, instanceOf, minicomputer family]
-
A.
minicomputer manufacturer
A minicomputer manufacturer is a company that designs, produces, and sells mid-sized computers that offer greater processing power than microcomputers but are smaller and less expensive than mainframes, typically serving business, scientific, or industrial applications.
-
B.
PDP series computer
A PDP series computer is a family of minicomputers produced by Digital Equipment Corporation (DEC) from the 1960s to 1980s, known for their relatively low cost, interactive use, and significant influence on computer architecture and operating systems.
-
C.
8-bit computer family
A 8-bit computer family is a group of closely related computer models built around an 8-bit processor architecture, sharing a common instruction set, design philosophy, and often compatible hardware and software ecosystems.
-
D.
minicomputer line
chosen
A minicomputer line is a series of related mid-sized computer systems designed to offer multi-user processing power and functionality between that of mainframes and microcomputers.
-
E.
mainframe computer series
A mainframe computer series is a family of high-performance, large-scale computers designed for reliable, centralized processing of massive workloads and critical enterprise applications over multiple generations.
- F. None of above.
Provenance (1 batch)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69e2c4cc35a48190990b7571bc086df8 |
completed | April 17, 2026, 11:39 p.m. |
Created at: April 18, 2026, 2:28 a.m.