Triple

T22604680
Position Surface form Disambiguated ID Type / Status
Subject ARM9 E566522 entity
Predicate mmuSupport P87753 FINISHED
Object memory management unit (in ARM920T, ARM926EJ-S and others) LITERAL FINISHED

How this triple was built (2 steps)

Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.

NER Named-entity recognition gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: memory management unit (in ARM920T, ARM926EJ-S and others) | Statement: [ARM9, mmuSupport, memory management unit (in ARM920T, ARM926EJ-S and others)]
PD Predicate disambiguation gpt-5-mini-2025-08-07
Target predicate: mmuSupport
Context triple: [ARM9, mmuSupport, memory management unit (in ARM920T, ARM926EJ-S and others)]
  • A. hasIntegratedMMU chosen
    Indicates that a system or processor includes a built-in Memory Management Unit (MMU) as part of its architecture.
  • B. memoryManagementUnit
    Indicates a relationship where a component or mechanism manages and translates memory addresses or access between different parts of a system.
  • C. requiresMOS
    Indicates that one entity depends on or mandates a specific Military Occupational Specialty (MOS) qualification associated with another entity in order to be valid or applicable.
  • D. supportsMemoryProtection
    Indicates that one entity provides mechanisms to prevent unauthorized access or interference with another entity’s memory space.
  • E. maxUnifiedMemory
    Indicates the maximum amount of unified (shared CPU/GPU) memory that can be allocated or used in a given context.
  • F. None of above.

Provenance (3 batches)

The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.

Step Stage Batch ID Status When
creating Elicitation batch_69e245884860819081046ce07d5872c4 completed April 17, 2026, 2:36 p.m.
NER Named-entity recognition batch_69f162709d808190af83837104a190f9 completed April 29, 2026, 1:44 a.m.
PD Predicate disambiguation batch_69ee627be4248190889a88764624e174 completed April 26, 2026, 7:07 p.m.
Created at: April 17, 2026, 2:52 p.m.