Triple

T22445537
Position Surface form Disambiguated ID Type / Status
Subject IEEE Scheme E554853 entity
Predicate hasVersion P455 FINISHED
Object IEEE Std 1178-1990 NE NERFINISHED

How this triple was built (2 steps)

Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.

NER Named-entity recognition gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: IEEE Std 1178-1990 | Statement: [IEEE Scheme, hasVersion, IEEE Std 1178-1990]
NED1 Entity disambiguation (via context triple) gpt-5-mini-2025-08-07
Target entity: IEEE Std 1178-1990
Context triple: [IEEE Scheme, hasVersion, IEEE Std 1178-1990]
  • A. IEEE Std 1178-1990 chosen
    IEEE Std 1178-1990 is the IEEE standard that formally specifies the Scheme programming language, defining its syntax, semantics, and core features for consistent implementation and use.
  • B. IEEE 1496-1993
    IEEE 1496-1993 is an IEEE standard that specifies the SBus computer bus architecture used primarily in Sun Microsystems workstations and servers.
  • C. IEEE 1196
    IEEE 1196 is the IEEE standard that formally defines the NuBus computer bus architecture used in various workstation and personal computer systems.
  • D. IEEE 1014-1987
    IEEE 1014-1987 is a formal IEEE standard that defines the VMEbus computer bus architecture widely used in embedded and industrial systems.
  • E. IEEE 1532
    IEEE 1532 is an extension of the JTAG boundary-scan standard that defines in-system programming and configuration procedures for programmable devices such as FPGAs and CPLDs.
  • F. None of above.
  • G. Unsure - the case is ambiguous/there is not enough information to decide.

Provenance (2 batches)

The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.

Step Stage Batch ID Status When
creating Elicitation batch_69e11e5113208190ab58c6b595f9d1d0 completed April 16, 2026, 5:37 p.m.
NER Named-entity recognition batch_69f15b46e8ac8190bfa8c611ffcba822 completed April 29, 2026, 1:13 a.m.
Created at: April 16, 2026, 8:47 p.m.