Triple
T21627543
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | ZX Spectrum |
E533740
|
entity |
| Predicate | memoryConfigurations |
P145287
|
FINISHED |
| Object | 16 KB RAM |
—
|
LITERAL FINISHED |
How this triple was built (2 steps)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
NER
Named-entity recognition
gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: 16 KB RAM | Statement: [ZX Spectrum, memoryConfigurations, 16 KB RAM]
PD
Predicate disambiguation
gpt-5-mini-2025-08-07
Target predicate: memoryConfigurations Context triple: [ZX Spectrum, memoryConfigurations, 16 KB RAM]
-
A.
memoryController
Indicates a relationship where one entity manages, coordinates, or regulates access to memory resources for another entity or system.
-
B.
memoryType
Indicates the specific category or kind of memory associated with an entity or process.
-
C.
memoryCharacteristic
Indicates a relationship where a specific property or quality is attributed to a memory or memory-related entity.
-
D.
memoryInterface
Indicates that one entity serves as an interface or access point for interacting with, reading from, or writing to another entity’s memory.
-
E.
integratedMemoryController
Indicates that a memory controller is built directly into another component (such as a processor or chipset) rather than existing as a separate, external unit.
- F. None of above. chosen
Provenance (4 batches)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69e0c464fba881908d0ff2ac80511ce1 |
completed | April 16, 2026, 11:13 a.m. |
| NER | Named-entity recognition | batch_69ef52141e1c8190a861f4bc7cfcb490 |
completed | April 27, 2026, 12:09 p.m. |
| PD | Predicate disambiguation | batch_69e69677b9c48190bf81f795aa8ad74e |
completed | April 20, 2026, 9:11 p.m. |
| PDg | Predicate description generation | batch_69e69cb4bcbc8190a4fc2d508df107be |
completed | April 20, 2026, 9:37 p.m. |
Created at: April 16, 2026, 6:34 p.m.