Triple
T16921896
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | RAD6000 |
E410461
|
entity |
| Predicate | developedFrom |
P1245
|
FINISHED |
| Object |
IBM RISC Single Chip (RSC)
IBM RISC Single Chip (RSC) is a single-chip implementation of IBM’s early POWER/RISC architecture that served as the basis for later ruggedized processors like the RAD6000.
|
E871282
|
NE FINISHED |
How this triple was built (4 steps)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
NER
Named-entity recognition
gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: IBM RISC Single Chip (RSC) | Statement: [RAD6000, developedFrom, IBM RISC Single Chip (RSC)]
NED1
Entity disambiguation (via context triple)
gpt-5-mini-2025-08-07
Target entity: IBM RISC Single Chip (RSC) Context triple: [RAD6000, developedFrom, IBM RISC Single Chip (RSC)]
-
A.
IBM POWER3 family
The IBM POWER3 family is a line of 64-bit RISC microprocessors designed by IBM for high-performance technical and scientific computing systems.
-
B.
IBM POWER2 processors
IBM POWER2 processors are a family of high-performance RISC microprocessors developed by IBM in the early 1990s for its RS/6000 systems and high-end servers, known for strong floating-point capabilities and parallel processing support.
-
C.
IBM POWER1
IBM POWER1 is IBM's first-generation POWER (Performance Optimization With Enhanced RISC) microprocessor architecture, introduced for high-performance RISC-based servers and workstations in the early 1990s.
-
D.
Risc PC
Risc PC is a modular personal computer introduced by Acorn Computers in the 1990s, known for its RISC-based architecture and expandability.
-
E.
POWER2 RISC processor
The POWER2 RISC processor is IBM’s second-generation high-performance Reduced Instruction Set Computing microprocessor, used primarily in RS/6000 workstations and servers during the early to mid-1990s.
- F. None of above. chosen
- G. Unsure - the case is ambiguous/there is not enough information to decide.
NEDg
Description generation
gpt-5.1
Instruction
Generate a one-sentence description of the target entity. You are given a context triple in the form (subject, predicate, object), where the object is the target entity. # Instructions Use the triple to infer relevant information about the entity. Describe the entity based on what is most defining, well-known. Avoid repeating the information from the triple, unless really essential. # Response Format Return only the sentence: "Description: [one-sentence description of the target entity]"
Input
Entity: IBM RISC Single Chip (RSC) Triple: [RAD6000, developedFrom, IBM RISC Single Chip (RSC)]
Generated description
IBM RISC Single Chip (RSC) is a single-chip implementation of IBM’s early POWER/RISC architecture that served as the basis for later ruggedized processors like the RAD6000.
NED2
Entity disambiguation (via description)
gpt-5-mini-2025-08-07
Target entity: IBM RISC Single Chip (RSC) Target entity description: IBM RISC Single Chip (RSC) is a single-chip implementation of IBM’s early POWER/RISC architecture that served as the basis for later ruggedized processors like the RAD6000.
-
A.
IBM POWER3 family
The IBM POWER3 family is a line of 64-bit RISC microprocessors designed by IBM for high-performance technical and scientific computing systems.
-
B.
IBM POWER2 processors
IBM POWER2 processors are a family of high-performance RISC microprocessors developed by IBM in the early 1990s for its RS/6000 systems and high-end servers, known for strong floating-point capabilities and parallel processing support.
-
C.
IBM POWER1
chosen
IBM POWER1 is IBM's first-generation POWER (Performance Optimization With Enhanced RISC) microprocessor architecture, introduced for high-performance RISC-based servers and workstations in the early 1990s.
-
D.
Risc PC
Risc PC is a modular personal computer introduced by Acorn Computers in the 1990s, known for its RISC-based architecture and expandability.
-
E.
POWER2 RISC processor
The POWER2 RISC processor is IBM’s second-generation high-performance Reduced Instruction Set Computing microprocessor, used primarily in RS/6000 workstations and servers during the early to mid-1990s.
- F. None of above.
Provenance (5 batches)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69d886c7b1e481908c3766dfa8c13458 |
completed | April 10, 2026, 5:12 a.m. |
| NER | Named-entity recognition | batch_69e3cdef7df881908b69aa3c4f50ef94 |
completed | April 18, 2026, 6:31 p.m. |
| NED1 | Entity disambiguation (via context triple) | batch_6a00cfd3c488819089e3791c7e704baf |
completed | May 10, 2026, 6:34 p.m. |
| NEDg | Description generation | batch_6a00d0e1650881909eacc90cf99787f4 |
completed | May 10, 2026, 6:39 p.m. |
| NED2 | Entity disambiguation (via description) | batch_6a00d1e024e88190bfcb50b42f37949b |
completed | May 10, 2026, 6:43 p.m. |
Created at: April 10, 2026, 5:30 a.m.