Triple
T16921892
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | RAD6000 |
E410461
|
entity |
| Predicate | instanceOf |
P0
|
FINISHED |
| Object | radiation-hardened microprocessor |
C4925
|
CONCEPT FINISHED |
How this triple was built (1 step)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
CD
Concept disambiguation
gpt-5-mini-2025-08-07
Target class: radiation-hardened microprocessor Context triple: [RAD6000, instanceOf, radiation-hardened microprocessor]
-
A.
CMOS microprocessor
A CMOS microprocessor is a central processing unit implemented using complementary metal-oxide-semiconductor technology, providing high integration, low power consumption, and reliable digital computation on a single chip.
-
B.
microprocessor
chosen
A microprocessor is a compact, integrated circuit that performs the arithmetic, logic, control, and input/output operations of a computer’s central processing unit (CPU) on a single chip.
-
C.
computer chip
A computer chip is a small, integrated electronic circuit composed of microscopic components that processes and stores data to perform computational tasks within electronic devices.
-
D.
system-on-chip
A system-on-chip is an integrated circuit that combines a complete electronic system’s core components—such as processor, memory, input/output interfaces, and specialized accelerators—onto a single chip.
-
E.
microprocessor feature
A microprocessor feature is a specific capability or characteristic of a microprocessor—such as instruction sets, cache size, power management, or parallelism—that defines its performance, functionality, and suitability for particular applications.
- F. None of above.
Provenance (1 batch)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69d886c7b1e481908c3766dfa8c13458 |
completed | April 10, 2026, 5:12 a.m. |
Created at: April 10, 2026, 5:30 a.m.