Triple
T16852307
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | AMD Athlon 64 |
E409703
|
entity |
| Predicate | instanceOf |
P0
|
FINISHED |
| Object | microprocessor family |
C3600
|
CONCEPT FINISHED |
Provenance (1 batch)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69d88395e6c88190b22730f335107c14 |
completed | April 10, 2026, 4:59 a.m. |
Created at: April 10, 2026, 5:24 a.m.