Triple
T1649825
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | Intel 8088 |
E35665
|
entity |
| Predicate | instanceOf |
P0
|
FINISHED |
| Object | x86 microprocessor |
C2781
|
CONCEPT FINISHED |
Provenance (1 batch)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69a8860568888190a32cd9f70acbba42 |
completed | March 4, 2026, 7:20 p.m. |
Created at: March 4, 2026, 7:29 p.m.