Triple

T15740190
Position Surface form Disambiguated ID Type / Status
Subject Mark Weissenstern E381581 entity
Predicate coFounded P104 FINISHED
Object Signetics E81722 NE FINISHED

How this triple was built (2 steps)

Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.

NER Named-entity recognition gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: Signetics | Statement: [Mark Weissenstern, coFounded, Signetics]
NED1 Entity disambiguation (via context triple) gpt-5-mini-2025-08-07
Target entity: Signetics
Context triple: [Mark Weissenstern, coFounded, Signetics]
  • A. Signetics chosen
    Signetics was an early integrated circuit and semiconductor manufacturer that became known for pioneering memory and logic chips before being acquired by Philips.
  • B. National Semiconductor
    National Semiconductor was a major American semiconductor company known for its analog and mixed-signal integrated circuits, later acquired by Texas Instruments.
  • C. Mostek
    Mostek was an American semiconductor company known for its influential role in early microprocessor, memory, and bus interface technologies during the 1970s and 1980s.
  • D. Zilog
    Zilog is an American microprocessor company best known for creating the influential Z80 CPU, widely used in early personal computers and embedded systems.
  • E. Intersil
    Intersil is an American semiconductor company known for designing and manufacturing analog, mixed-signal, and power management integrated circuits for a wide range of electronic applications.
  • F. None of above.
  • G. Unsure - the case is ambiguous/there is not enough information to decide.

Provenance (3 batches)

The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.

Step Stage Batch ID Status When
creating Elicitation batch_69d86d9cdb648190bf3171be0bd7d872 completed April 10, 2026, 3:25 a.m.
NER Named-entity recognition batch_69e04fd816308190a297986ee7e5554c completed April 16, 2026, 2:56 a.m.
NED1 Entity disambiguation (via context triple) batch_69ff876b7fd081909d84ebe7a4cdb675 completed May 9, 2026, 7:13 p.m.
Created at: April 10, 2026, 4:46 a.m.