Triple
T14576744
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | Nokia N73 |
E342071
|
entity |
| Predicate | cpu |
P8608
|
FINISHED |
| Object | ARM9 |
E566522
|
NE FINISHED |
How this triple was built (2 steps)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
NER
Named-entity recognition
gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: ARM9 | Statement: [Nokia N73, cpu, ARM9]
NED1
Entity disambiguation (via context triple)
gpt-5-mini-2025-08-07
Target entity: ARM9 Context triple: [Nokia N73, cpu, ARM9]
-
A.
ARM9
chosen
ARM9 is a family of 32-bit RISC microprocessor cores from ARM designed for embedded systems, known for their balance of performance, power efficiency, and widespread use in consumer and industrial devices.
-
B.
ARM710
ARM710 is a 32-bit ARM RISC microprocessor core from ARM's early ARM7 family, commonly used in mid-1990s embedded systems and personal computers.
-
C.
ARM7TDMI
ARM7TDMI is a 32-bit RISC microprocessor core from ARM's ARM7 family, widely used in embedded systems and handheld gaming devices for its low power consumption and Thumb instruction set support.
-
D.
StrongARM SA-110
The StrongARM SA-110 is a high-performance, low-power 32-bit RISC microprocessor developed by Digital Equipment Corporation and ARM, widely used in embedded systems and early ARM-based personal computers.
-
E.
ARM10 processor family
The ARM10 processor family is a series of 32-bit RISC microprocessor cores from ARM designed for embedded and mobile applications, offering improved performance and efficiency over earlier ARM generations.
- F. None of above.
- G. Unsure - the case is ambiguous/there is not enough information to decide.
Provenance (3 batches)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69d822dcc6248190bed689984bceb0e2 |
completed | April 9, 2026, 10:06 p.m. |
| NER | Named-entity recognition | batch_69deb3f5ec448190b2ef887fdf7b633e |
completed | April 14, 2026, 9:39 p.m. |
| NED1 | Entity disambiguation (via context triple) | batch_69fd8ace7da48190880a736ead5c4055 |
completed | May 8, 2026, 7:03 a.m. |
Created at: April 10, 2026, 1:24 a.m.