Triple
T14389068
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | Acorn Archimedes |
E356794
|
entity |
| Predicate | introducedTechnology |
P14232
|
FINISHED |
| Object | ARM2 processor to the consumer market |
E13771
|
NE FINISHED |
How this triple was built (2 steps)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
NER
Named-entity recognition
gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: ARM2 processor to the consumer market | Statement: [Acorn Archimedes, introducedTechnology, ARM2 processor to the consumer market]
NED1
Entity disambiguation (via context triple)
gpt-5-mini-2025-08-07
Target entity: ARM2 processor to the consumer market Context triple: [Acorn Archimedes, introducedTechnology, ARM2 processor to the consumer market]
-
A.
Crusoe microprocessor
The Crusoe microprocessor is a low-power, x86-compatible CPU line from Transmeta that used code-morphing software to translate x86 instructions to an underlying VLIW architecture, targeting laptops and mobile devices.
-
B.
POWER2 RISC processor
The POWER2 RISC processor is IBM’s second-generation high-performance Reduced Instruction Set Computing microprocessor, used primarily in RS/6000 workstations and servers during the early to mid-1990s.
-
C.
ARM9
ARM9 is a family of 32-bit RISC microprocessor cores from ARM designed for embedded systems, known for their balance of performance, power efficiency, and widespread use in consumer and industrial devices.
-
D.
ARM
chosen
ARM is a family of energy-efficient RISC processor architectures widely used in mobile devices, embedded systems, and increasingly in laptops and servers.
-
E.
ARM
ARM is the station code used to identify Plaza de Armas station within its transit network.
- F. None of above.
- G. Unsure - the case is ambiguous/there is not enough information to decide.
Provenance (3 batches)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69d827927c988190ad98bb0360981783 |
completed | April 9, 2026, 10:26 p.m. |
| NER | Named-entity recognition | batch_69de9029ef048190bdda5ee41618e720 |
completed | April 14, 2026, 7:06 p.m. |
| NED1 | Entity disambiguation (via context triple) | batch_69fd551623608190ba1de09b423cc5e1 |
completed | May 8, 2026, 3:14 a.m. |
Created at: April 10, 2026, 1:16 a.m.