Triple

T1429501
Position Surface form Disambiguated ID Type / Status
Subject Intel Atom E30411 entity
Predicate supports P516 FINISHED
Object SSE3
SSE3 (Streaming SIMD Extensions 3) is an Intel CPU instruction set extension that adds additional SIMD operations to improve performance in multimedia, gaming, and scientific applications.
 E164899 NE FINISHED

How this triple was built (4 steps)

Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.

NER Named-entity recognition gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: SSE3 | Statement: [Intel Atom, supports, SSE3]
NED1 Entity disambiguation (via context triple) gpt-5-mini-2025-08-07 
Target entity: SSE3
Context triple: [Intel Atom, supports, SSE3]
  • A. SSE2
    SSE2 is an x86 processor instruction set extension introduced by Intel that adds advanced SIMD (Single Instruction, Multiple Data) capabilities for faster floating-point and integer computations.
  • B. Intel AVX
    Intel AVX is an x86 processor instruction set extension from Intel that accelerates floating-point and vector-intensive workloads, commonly used in high-performance computing, multimedia, and scientific applications.
  • C. Intel AES-NI
    Intel AES-NI is a set of hardware instructions introduced by Intel to accelerate and secure AES encryption and decryption operations in modern processors.
  • D. Intel 64
    Intel 64 is Intel’s 64-bit architecture extension that enables x86 processors to handle 64-bit computing, including larger memory addressing and enhanced performance for modern applications.
  • E. IA-32
    IA-32 is Intel’s 32-bit x86 architecture used as the basis for many generations of desktop, mobile, and embedded processors.
  • F. None of above. chosen
  • G. Unsure - the case is ambiguous/there is not enough information to decide.
NEDg Description generation gpt-5.1
Instruction
Generate a one-sentence description of the target entity. 
You are given a context triple in the form (subject, predicate, object), where the object is the target entity. 
# Instructions
Use the triple to infer relevant information about the entity. Describe the entity based on what is most defining, well-known. 
Avoid repeating the information from the triple, unless really essential.
# Response Format
Return only the sentence: "Description: [one-sentence description of the target entity]"
Input
Entity: SSE3
Triple: [Intel Atom, supports, SSE3]
Generated description
SSE3 (Streaming SIMD Extensions 3) is an Intel CPU instruction set extension that adds additional SIMD operations to improve performance in multimedia, gaming, and scientific applications.
NED2 Entity disambiguation (via description) gpt-5-mini-2025-08-07 
Target entity: SSE3
Target entity description: SSE3 (Streaming SIMD Extensions 3) is an Intel CPU instruction set extension that adds additional SIMD operations to improve performance in multimedia, gaming, and scientific applications.
  • A. SSE2
    SSE2 is an x86 processor instruction set extension introduced by Intel that adds advanced SIMD (Single Instruction, Multiple Data) capabilities for faster floating-point and integer computations.
  • B. Intel AVX
    Intel AVX is an x86 processor instruction set extension from Intel that accelerates floating-point and vector-intensive workloads, commonly used in high-performance computing, multimedia, and scientific applications.
  • C. Intel AES-NI
    Intel AES-NI is a set of hardware instructions introduced by Intel to accelerate and secure AES encryption and decryption operations in modern processors.
  • D. Intel 64
    Intel 64 is Intel’s 64-bit architecture extension that enables x86 processors to handle 64-bit computing, including larger memory addressing and enhanced performance for modern applications.
  • E. IA-32
    IA-32 is Intel’s 32-bit x86 architecture used as the basis for many generations of desktop, mobile, and embedded processors.
  • F. None of above. chosen

Provenance (5 batches)

The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.

Step Stage Batch ID Status When
creating Elicitation batch_69a498fc69ec8190b61722bd4b67c4d2 completed March 1, 2026, 7:52 p.m.
NER Named-entity recognition batch_69a4c4db2d7481908d241593d0e17d83 completed March 1, 2026, 10:59 p.m.
NED1 Entity disambiguation (via context triple) batch_69ad08b35da08190b8c09ad393f310e3 completed March 8, 2026, 5:27 a.m.
NEDg Description generation batch_69ad09a3eef8819082093f33646906b5 completed March 8, 2026, 5:31 a.m.
NED2 Entity disambiguation (via description) batch_69ad0a30bcdc81908090d6a094ece0f4 completed March 8, 2026, 5:33 a.m.
Created at: March 1, 2026, 8 p.m.