Triple

T1422860
Position Surface form Disambiguated ID Type / Status
Subject Intel Xeon E30262 entity
Predicate supportsFeature P203 FINISHED
Object Intel Demand Based Switching
Intel Demand Based Switching is a power management technology for Intel Xeon processors that dynamically adjusts CPU frequency and voltage based on workload to reduce energy consumption while maintaining performance.
 E163105 NE FINISHED

How this triple was built (4 steps)

Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.

NER Named-entity recognition gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: Intel Demand Based Switching | Statement: [Intel Xeon, supportsFeature, Intel Demand Based Switching]
NED1 Entity disambiguation (via context triple) gpt-5-mini-2025-08-07 
Target entity: Intel Demand Based Switching
Context triple: [Intel Xeon, supportsFeature, Intel Demand Based Switching]
  • A. SGI Altix ICE architecture
    SGI Altix ICE architecture is a high-performance computing platform designed by Silicon Graphics for scalable, cluster-based supercomputers using industry-standard components and advanced interconnects.
  • B. SPARC microprocessor architecture
    The SPARC microprocessor architecture is a RISC-based instruction set architecture widely used in high-performance and enterprise servers, originally created to power scalable, multi-processor systems.
  • C. Transmeta
    Transmeta was an innovative semiconductor company best known for its low-power x86-compatible microprocessors and for employing Linux creator Linus Torvalds.
  • D. Intel Inside
    Intel Inside is a famous marketing slogan and branding campaign used to promote personal computers powered by Intel processors.
  • E. IEEE 802.1Qdm resource management standard
    The IEEE 802.1Qdm resource management standard is an IEEE 802.1 Time-Sensitive Networking (TSN) specification that defines mechanisms for managing and allocating network resources to ensure predictable, reliable performance in bridged and time-sensitive Ethernet networks.
  • F. None of above. chosen
  • G. Unsure - the case is ambiguous/there is not enough information to decide.
NEDg Description generation gpt-5.1
Instruction
Generate a one-sentence description of the target entity. 
You are given a context triple in the form (subject, predicate, object), where the object is the target entity. 
# Instructions
Use the triple to infer relevant information about the entity. Describe the entity based on what is most defining, well-known. 
Avoid repeating the information from the triple, unless really essential.
# Response Format
Return only the sentence: "Description: [one-sentence description of the target entity]"
Input
Entity: Intel Demand Based Switching
Triple: [Intel Xeon, supportsFeature, Intel Demand Based Switching]
Generated description
Intel Demand Based Switching is a power management technology for Intel Xeon processors that dynamically adjusts CPU frequency and voltage based on workload to reduce energy consumption while maintaining performance.
NED2 Entity disambiguation (via description) gpt-5-mini-2025-08-07 
Target entity: Intel Demand Based Switching
Target entity description: Intel Demand Based Switching is a power management technology for Intel Xeon processors that dynamically adjusts CPU frequency and voltage based on workload to reduce energy consumption while maintaining performance.
  • A. SGI Altix ICE architecture
    SGI Altix ICE architecture is a high-performance computing platform designed by Silicon Graphics for scalable, cluster-based supercomputers using industry-standard components and advanced interconnects.
  • B. SPARC microprocessor architecture
    The SPARC microprocessor architecture is a RISC-based instruction set architecture widely used in high-performance and enterprise servers, originally created to power scalable, multi-processor systems.
  • C. Transmeta
    Transmeta was an innovative semiconductor company best known for its low-power x86-compatible microprocessors and for employing Linux creator Linus Torvalds.
  • D. Intel Inside
    Intel Inside is a famous marketing slogan and branding campaign used to promote personal computers powered by Intel processors.
  • E. IEEE 802.1Qdm resource management standard
    The IEEE 802.1Qdm resource management standard is an IEEE 802.1 Time-Sensitive Networking (TSN) specification that defines mechanisms for managing and allocating network resources to ensure predictable, reliable performance in bridged and time-sensitive Ethernet networks.
  • F. None of above. chosen

Provenance (5 batches)

The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.

Step Stage Batch ID Status When
creating Elicitation batch_69a498fb823c8190a67ce4c4837e641a completed March 1, 2026, 7:52 p.m.
NER Named-entity recognition batch_69a4c4ba798881909c2259987248b030 completed March 1, 2026, 10:59 p.m.
NED1 Entity disambiguation (via context triple) batch_69ad0161e23c819099a1c72627f13dd0 completed March 8, 2026, 4:56 a.m.
NEDg Description generation batch_69ad01c53e808190824b9702c309f0a2 completed March 8, 2026, 4:57 a.m.
NED2 Entity disambiguation (via description) batch_69ad0241546881908f1044616255f146 completed March 8, 2026, 4:59 a.m.
Created at: March 1, 2026, 8 p.m.