Triple
T13509684
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | Sziklai pair |
E321104
|
entity |
| Predicate | instanceOf |
P0
|
FINISHED |
| Object | compound transistor |
C18110
|
CONCEPT FINISHED |
How this triple was built (1 step)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
CD
Concept disambiguation
gpt-5-mini-2025-08-07
Target class: compound transistor Context triple: [Sziklai pair, instanceOf, compound transistor]
-
A.
transistor
chosen
A transistor is a semiconductor device used to amplify or switch electronic signals and electrical power by controlling current flow between its terminals.
-
B.
compound semiconductor
A compound semiconductor is a semiconductor material formed from two or more different elements (such as gallium arsenide or indium phosphide) whose combined properties enable specialized electronic and optoelectronic device performance beyond that of elemental semiconductors like silicon.
-
C.
transistor configuration
A transistor configuration is a specific way of connecting a transistor’s terminals (such as common emitter, common base, or common collector) that determines its input-output relationships, gain characteristics, and typical applications in electronic circuits.
-
D.
bipolar junction transistor configuration
A bipolar junction transistor configuration is a specific arrangement of a BJT’s terminals and external components (such as common-emitter, common-base, or common-collector) that determines its input-output relationships, gain characteristics, and typical application in electronic circuits.
-
E.
high-speed transistor
A high-speed transistor is an electronic switching device designed with materials, structures, and geometries that minimize charge transit time and parasitic effects to enable very fast signal amplification and switching at high frequencies.
- F. None of above.
Provenance (1 batch)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69d807629d6c8190998f1b9bb12d2ed0 |
completed | April 9, 2026, 8:09 p.m. |
Created at: April 9, 2026, 9:43 p.m.