Triple

T13091999
Position Surface form Disambiguated ID Type / Status
Subject Digital computer E310483 entity
Predicate hasComponent P35 FINISHED
Object Central processing unit E484054 NE FINISHED

How this triple was built (2 steps)

Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.

NER Named-entity recognition gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: Central processing unit | Statement: [Digital computer, hasComponent, Central processing unit]
NED1 Entity disambiguation (via context triple) gpt-5-mini-2025-08-07
Target entity: Central processing unit
Context triple: [Digital computer, hasComponent, Central processing unit]
  • A. CPU chosen
    A CPU (Central Processing Unit) is the primary component of a computer that performs most of the processing and executes instructions for programs and operating systems.
  • B. Unidad Central Operativa
    Unidad Central Operativa is a specialized investigative unit of Spain’s Guardia Civil focused on tackling serious and organized crime at the national level.
  • C. Digital Processing Unit
    The Digital Processing Unit is an onboard electronic module that performs computational and control functions for the SARA system’s operations.
  • D. Ivory microprocessor
    The Ivory microprocessor is a specialized Lisp processor designed to efficiently run Symbolics' advanced AI and symbolic computing systems.
  • E. System on a Chip
    A System on a Chip is an integrated circuit that combines a computer’s key components—such as CPU, memory, input/output interfaces, and often specialized processors—onto a single chip to create compact, efficient electronic systems.
  • F. None of above.
  • G. Unsure - the case is ambiguous/there is not enough information to decide.

Provenance (3 batches)

The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.

Step Stage Batch ID Status When
creating Elicitation batch_69d806a733548190989cfd4ce981ca33 completed April 9, 2026, 8:05 p.m.
NER Named-entity recognition batch_69d9813acbac8190b2fe5e07287457cf completed April 10, 2026, 11:01 p.m.
NED1 Entity disambiguation (via context triple) batch_69f6d61629ac8190a2dfa11951a877f0 completed May 3, 2026, 4:59 a.m.
Created at: April 9, 2026, 9:03 p.m.