Triple

T12999896
Position Surface form Disambiguated ID Type / Status
Subject NeXTbus E322140 entity
Predicate instanceOf P0 FINISHED
Object proprietary bus architecture C29528 CONCEPT FINISHED

How this triple was built (1 step)

Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.

CD Concept disambiguation gpt-5-mini-2025-08-07 
Target class: proprietary bus architecture
Context triple: [NeXTbus, instanceOf, proprietary bus architecture]
  • A. parallel computer bus chosen
    A parallel computer bus is a communication system that transfers multiple bits of data simultaneously across multiple wires or channels between components within a computer system.
  • B. VMEbus system
    A VMEbus system is a modular computer architecture that uses a shared parallel bus to interconnect processors, memory, and I/O boards in a standardized backplane for industrial and embedded applications.
  • C. serial bus interface standard
    A serial bus interface standard defines the electrical, timing, and protocol rules that govern how devices communicate and exchange data over a serial communication bus.
  • D. VMEbus board
    A VMEbus board is a modular printed circuit board that plugs into a VMEbus backplane to provide processing, I/O, memory, or specialized functions within an embedded or industrial computer system.
  • E. RISC architecture
    A RISC architecture is a computer processor design that uses a small, highly optimized set of simple instructions to achieve high performance through efficient pipelining and parallelism.
  • F. None of above.

Provenance (1 batch)

The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.

Step Stage Batch ID Status When
creating Elicitation batch_69d8076479b8819090afce3591939cdf completed April 9, 2026, 8:09 p.m.
Created at: April 9, 2026, 8:46 p.m.