Triple

T12779628
Position Surface form Disambiguated ID Type / Status
Subject Robert Hartmann E305470 entity
Predicate coFounded P104 FINISHED
Object Altera E29768 NE FINISHED

How this triple was built (2 steps)

Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.

NER Named-entity recognition gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: Altera | Statement: [Robert Hartmann, coFounded, Altera]
NED1 Entity disambiguation (via context triple) gpt-5-mini-2025-08-07
Target entity: Altera
Context triple: [Robert Hartmann, coFounded, Altera]
  • A. Altera chosen
    Altera is a semiconductor company best known for its programmable logic devices (FPGAs) and related design tools, now operating as a subsidiary of Intel.
  • B. Stratix
    Stratix is a high-performance family of field-programmable gate arrays (FPGAs) designed by Altera (now part of Intel) for demanding digital logic and signal processing applications.
  • C. Lattice Semiconductor
    Lattice Semiconductor is an American technology company that designs and manufactures low-power, programmable logic devices used in a wide range of electronics and embedded systems.
  • D. Microsemi
    Microsemi was a semiconductor company known for providing high-reliability, defense, aerospace, and communications solutions before being acquired by Microchip Technology.
  • E. Xilinx
    Xilinx is a leading semiconductor company best known for its programmable logic devices, particularly FPGAs and related development tools.
  • F. None of above.
  • G. Unsure - the case is ambiguous/there is not enough information to decide.

Provenance (3 batches)

The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.

Step Stage Batch ID Status When
creating Elicitation batch_69d7bdf2b43c819098ae5aa68e61ea58 completed April 9, 2026, 2:55 p.m.
NER Named-entity recognition batch_69d96e5a5680819095dcd491486d23e7 completed April 10, 2026, 9:40 p.m.
NED1 Entity disambiguation (via context triple) batch_69f685030cbc8190856bf5254e231d25 completed May 2, 2026, 11:13 p.m.
Created at: April 9, 2026, 5:29 p.m.