Triple

T12280969
Position Surface form Disambiguated ID Type / Status
Subject libunwind E292714 entity
Predicate supports P516 FINISHED
Object AArch64 architecture E229087 NE FINISHED

Named-entity recognition

Before disambiguation, gpt-5-mini classified whether the object phrase is a named entity — the step behind the object's NE type shown above.

Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: AArch64 architecture | Statement: [libunwind, supports, AArch64 architecture]

Disambiguation candidates (1 decision)

The exact options the model was shown at each disambiguation step, with the option it chose highlighted — the evidence behind this triple's disambiguated ids.

NED1 Entity disambiguation (via context triple) gpt-5-mini-2025-08-07
Target entity: AArch64 architecture
Context triple: [libunwind, supports, AArch64 architecture]
  • A. ARMv8-A chosen
    ARMv8-A is a 64-bit ARM processor architecture generation that introduces the AArch64 execution state and underpins many modern mobile and desktop CPUs.
  • B. ARMv9-A
    ARMv9-A is a modern 64-bit ARM architecture generation that introduces enhanced performance, security, and AI-focused features for advanced processors used in devices like Apple’s M-series chips.
  • C. ARMv8.2-M
    ARMv8.2-M is a 32-bit ARM microcontroller architecture revision that enhances the ARMv8-M family with improved performance, security, and DSP/ML capabilities for embedded and IoT applications.
  • D. ARM Neoverse
    ARM Neoverse is a family of 64-bit ARM-based processor platforms designed primarily for high-performance cloud, data center, and infrastructure workloads.
  • E. ARMv8.1-M
    ARMv8.1-M is an ARM microcontroller architecture revision that enhances the ARMv8-M baseline with improved performance, security, and DSP capabilities for embedded and IoT applications.
  • F. None of above.
  • G. Unsure - the case is ambiguous/there is not enough information to decide.

Provenance (3 batches)

Stage Batch ID Job type Status
creating batch_69d6ab690ad081908c0ed3870ec82d53 elicitation completed
NER batch_69d91cf2b09c81908a11581d33f65be0 ner completed
NED1 batch_69f63eec11688190a317f9e692b23ca5 ned_source_triple completed
Created at: April 8, 2026, 9:52 p.m.