Triple

T12081182
Position Surface form Disambiguated ID Type / Status
Subject Linux kernel hardening E287680 entity
Predicate usesMechanism P1687 FINISHED
Object SMEP (Supervisor Mode Execution Prevention)
SMEP (Supervisor Mode Execution Prevention) is a CPU security feature that blocks the kernel from executing code located in user-space memory, helping prevent privilege escalation attacks.
 E968045 NE FINISHED

How this triple was built (4 steps)

Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.

NER Named-entity recognition gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: SMEP (Supervisor Mode Execution Prevention) | Statement: [Linux kernel hardening, usesMechanism, SMEP (Supervisor Mode Execution Prevention)]
NED1 Entity disambiguation (via context triple) gpt-5-mini-2025-08-07 
Target entity: SMEP (Supervisor Mode Execution Prevention)
Context triple: [Linux kernel hardening, usesMechanism, SMEP (Supervisor Mode Execution Prevention)]
  • A. Intel MPX
    Intel MPX is a hardware-based memory protection extension for Intel processors designed to help prevent buffer overflows by enforcing bounds checking on pointer references.
  • B. XD bit (Execute Disable Bit)
    XD bit (Execute Disable Bit) is a hardware-based security feature in modern processors that helps prevent certain types of malicious code execution by marking specific areas of memory as non-executable.
  • C. Intel Trusted Execution Technology
    Intel Trusted Execution Technology is a hardware-based security feature that helps ensure a trusted, measured launch and execution environment for software on Intel platforms.
  • D. Trusted Execution Environment
    A Trusted Execution Environment (TEE) is a secure area of a main processor that runs isolated code and protects sensitive data from the rest of the system, even if the operating system is compromised.
  • E. Intel VT-x or AMD-V
    Intel VT-x or AMD-V are hardware-assisted virtualization technologies built into modern Intel and AMD processors that enable efficient and secure running of virtual machines.
  • F. None of above. chosen
  • G. Unsure - the case is ambiguous/there is not enough information to decide.
NEDg Description generation gpt-5.1
Instruction
Generate a one-sentence description of the target entity. 
You are given a context triple in the form (subject, predicate, object), where the object is the target entity. 
# Instructions
Use the triple to infer relevant information about the entity. Describe the entity based on what is most defining, well-known. 
Avoid repeating the information from the triple, unless really essential.
# Response Format
Return only the sentence: "Description: [one-sentence description of the target entity]"
Input
Entity: SMEP (Supervisor Mode Execution Prevention)
Triple: [Linux kernel hardening, usesMechanism, SMEP (Supervisor Mode Execution Prevention)]
Generated description
SMEP (Supervisor Mode Execution Prevention) is a CPU security feature that blocks the kernel from executing code located in user-space memory, helping prevent privilege escalation attacks.
NED2 Entity disambiguation (via description) gpt-5-mini-2025-08-07 
Target entity: SMEP (Supervisor Mode Execution Prevention)
Target entity description: SMEP (Supervisor Mode Execution Prevention) is a CPU security feature that blocks the kernel from executing code located in user-space memory, helping prevent privilege escalation attacks.
  • A. Intel MPX
    Intel MPX is a hardware-based memory protection extension for Intel processors designed to help prevent buffer overflows by enforcing bounds checking on pointer references.
  • B. XD bit (Execute Disable Bit)
    XD bit (Execute Disable Bit) is a hardware-based security feature in modern processors that helps prevent certain types of malicious code execution by marking specific areas of memory as non-executable.
  • C. Intel Trusted Execution Technology
    Intel Trusted Execution Technology is a hardware-based security feature that helps ensure a trusted, measured launch and execution environment for software on Intel platforms.
  • D. Trusted Execution Environment
    A Trusted Execution Environment (TEE) is a secure area of a main processor that runs isolated code and protects sensitive data from the rest of the system, even if the operating system is compromised.
  • E. Intel VT-x or AMD-V
    Intel VT-x or AMD-V are hardware-assisted virtualization technologies built into modern Intel and AMD processors that enable efficient and secure running of virtual machines.
  • F. None of above. chosen

Provenance (5 batches)

The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.

Step Stage Batch ID Status When
creating Elicitation batch_69d6ab4964708190850585628b287b0c completed April 8, 2026, 7:23 p.m.
NER Named-entity recognition batch_69d904dc98a88190a5873f3fd8e1a0b2 completed April 10, 2026, 2:10 p.m.
NED1 Entity disambiguation (via context triple) batch_69f5f66509208190b7206e78df41c2fe completed May 2, 2026, 1:04 p.m.
NEDg Description generation batch_69f6022ecf38819080f0eb6a3a815c5b completed May 2, 2026, 1:54 p.m.
NED2 Entity disambiguation (via description) batch_69f606560934819092ba4d4fa162b799 completed May 2, 2026, 2:12 p.m.
Created at: April 8, 2026, 9:48 p.m.