Triple
T11631839
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | Apple A13 Bionic |
E276416
|
entity |
| Predicate | l1CachePerPerformanceCore |
P41979
|
FINISHED |
| Object | 128 KB instruction cache |
—
|
LITERAL FINISHED |
How this triple was built (2 steps)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
NER
Named-entity recognition
gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: 128 KB instruction cache | Statement: [Apple A13 Bionic, l1CachePerPerformanceCore, 128 KB instruction cache]
PD
Predicate disambiguation
gpt-5-mini-2025-08-07
Target predicate: l1CachePerPerformanceCore Context triple: [Apple A13 Bionic, l1CachePerPerformanceCore, 128 KB instruction cache]
-
A.
l1CachePerLittleCore
Indicates the size or capacity of the level-1 cache associated with each little (low-power) core in a processor.
-
B.
l1CachePerBigCore
chosen
Indicates the size or configuration of the level-1 cache associated with each big (high-performance) CPU core.
-
C.
l1CacheSize
Indicates the size or capacity of an entity’s level-1 (L1) cache memory.
-
D.
l2CacheBigCores
Indicates that the relationship or action involves the L2 cache associated with the system’s big (high-performance) cores.
-
E.
l2CacheLittleCores
Indicates that there is an L2 cache associated specifically with the system’s little (low-power) CPU cores.
- F. None of above.
Provenance (3 batches)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69d6aafa51148190ab84940694c00235 |
completed | April 8, 2026, 7:22 p.m. |
| NER | Named-entity recognition | batch_69d8a25aa9188190ab13d79139f37e7e |
completed | April 10, 2026, 7:10 a.m. |
| PD | Predicate disambiguation | batch_69d85dd94bdc819091fa2ed33eb31624 |
completed | April 10, 2026, 2:18 a.m. |
Created at: April 8, 2026, 9:39 p.m.