Triple

T11305666
Position Surface form Disambiguated ID Type / Status
Subject PCI-SIG E267706 entity
Predicate standardMaintained P9970 FINISHED
Object PCIe E53628 NE FINISHED

How this triple was built (2 steps)

Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.

NER Named-entity recognition gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: PCIe | Statement: [PCI-SIG, standardMaintained, PCIe]
NED1 Entity disambiguation (via context triple) gpt-5-mini-2025-08-07 
Target entity: PCIe
Context triple: [PCI-SIG, standardMaintained, PCIe]
  • A. PCI Express chosen
    PCI Express is a high-speed serial computer expansion bus standard used to connect components like graphics cards, SSDs, and network cards to a motherboard.
  • B. PCI-X
    PCI-X is an older high-speed parallel computer expansion bus standard used mainly in servers and workstations before being superseded by PCI Express.
  • C. Peripheral Component Interconnect
    Peripheral Component Interconnect (PCI) is a widely adopted computer bus standard introduced in the 1990s to connect peripheral devices to a motherboard, offering higher performance and flexibility than earlier expansion bus architectures.
  • D. NVMe
    NVMe (Non-Volatile Memory Express) is a high-performance storage protocol designed specifically for solid-state drives over PCIe, offering significantly lower latency and higher throughput than traditional storage interfaces like SATA.
  • E. PCI bus
    The PCI bus is a widely adopted computer expansion bus standard that provides a high-speed, processor-independent interface for connecting peripheral devices to a motherboard.
  • F. None of above.
  • G. Unsure - the case is ambiguous/there is not enough information to decide.

Provenance (3 batches)

The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.

Step Stage Batch ID Status When
creating Elicitation batch_69d6aaca5c24819083db46a30d86cb34 completed April 8, 2026, 7:21 p.m.
NER Named-entity recognition batch_69d7e9a7255c81909675fe9ad6d71934 completed April 9, 2026, 6:02 p.m.
NED1 Entity disambiguation (via context triple) batch_69e5b7c700008190a2e6a3418248ea71 completed April 20, 2026, 5:21 a.m.
Created at: April 8, 2026, 9:32 p.m.