Triple
T11100578
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | Crusoe microprocessor |
E262490
|
entity |
| Predicate | instructionIssueWidth |
P74571
|
FINISHED |
| Object | VLIW multiple-issue core |
—
|
LITERAL FINISHED |
How this triple was built (2 steps)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
NER
Named-entity recognition
gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: VLIW multiple-issue core | Statement: [Crusoe microprocessor, instructionIssueWidth, VLIW multiple-issue core]
PD
Predicate disambiguation
gpt-5-mini-2025-08-07
Target predicate: instructionIssueWidth Context triple: [Crusoe microprocessor, instructionIssueWidth, VLIW multiple-issue core]
-
A.
instructionLength
Indicates the duration or amount of time required to carry out a given instruction or operation.
-
B.
executionWidth
chosen
Indicates the degree of parallelism or number of concurrent units used when executing an operation or process.
-
C.
instructionSetSize
Indicates the size or number of instructions defined in an instruction set.
-
D.
instructionCacheSize
Indicates the size or capacity of the instruction cache associated with a processor or computing component.
-
E.
bitWidth
Indicates the number of bits used to represent or encode a given value, type, or data element.
- F. None of above.
Provenance (3 batches)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69d6aa9a40d88190a373e2c7e48285db |
completed | April 8, 2026, 7:20 p.m. |
| NER | Named-entity recognition | batch_69d79a29ee6c819092bc0da3f9255389 |
completed | April 9, 2026, 12:23 p.m. |
| PD | Predicate disambiguation | batch_69d7441aa3548190b92dbde57841c135 |
completed | April 9, 2026, 6:15 a.m. |
Created at: April 8, 2026, 9:27 p.m.