Triple
T11100449
| Position | Surface form | Disambiguated ID | Type / Status |
|---|---|---|---|
| Subject | Transmeta |
E262486
|
entity |
| Predicate | notableProduct |
P1448
|
FINISHED |
| Object | Crusoe microprocessor |
E262490
|
NE FINISHED |
How this triple was built (2 steps)
Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.
NER
Named-entity recognition
gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: Crusoe microprocessor | Statement: [Transmeta, notableProduct, Crusoe microprocessor]
NED1
Entity disambiguation (via context triple)
gpt-5-mini-2025-08-07
Target entity: Crusoe microprocessor Context triple: [Transmeta, notableProduct, Crusoe microprocessor]
-
A.
Crusoe microprocessor
chosen
The Crusoe microprocessor is a low-power, x86-compatible CPU line from Transmeta that used code-morphing software to translate x86 instructions to an underlying VLIW architecture, targeting laptops and mobile devices.
-
B.
Ivory microprocessor
The Ivory microprocessor is a specialized Lisp processor designed to efficiently run Symbolics' advanced AI and symbolic computing systems.
-
C.
POWER2 RISC processor
The POWER2 RISC processor is IBM’s second-generation high-performance Reduced Instruction Set Computing microprocessor, used primarily in RS/6000 workstations and servers during the early to mid-1990s.
-
D.
Acorn RISC Machine
Acorn RISC Machine (ARM) is a family of energy-efficient reduced instruction set computer (RISC) architectures widely used in mobile devices, embedded systems, and increasingly in servers and personal computers.
-
E.
Hitachi SH-4
The Hitachi SH-4 is a 32-bit RISC microprocessor known for its use in late-1990s gaming consoles and embedded systems, featuring strong floating-point performance for 3D graphics.
- F. None of above.
- G. Unsure - the case is ambiguous/there is not enough information to decide.
Provenance (3 batches)
The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.
| Step | Stage | Batch ID | Status | When |
|---|---|---|---|---|
| creating | Elicitation | batch_69d6aa9a40d88190a373e2c7e48285db |
completed | April 8, 2026, 7:20 p.m. |
| NER | Named-entity recognition | batch_69d79a29ee6c819092bc0da3f9255389 |
completed | April 9, 2026, 12:23 p.m. |
| NED1 | Entity disambiguation (via context triple) | batch_69e3e7f9b46881909761ed448fa5ce6e |
completed | April 18, 2026, 8:22 p.m. |
Created at: April 8, 2026, 9:27 p.m.