Triple

T11001872
Position Surface form Disambiguated ID Type / Status
Subject IRS-1B E260020 entity
Predicate spacecraftBus P12569 FINISHED
Object IRS-1 bus
The IRS-1 bus is a standardized Indian satellite platform developed for the Indian Remote Sensing (IRS) series, providing the structural, power, and control systems for Earth observation spacecraft.
E898967 NE FINISHED

How this triple was built (4 steps)

Every LLM step that produced this triple, in pipeline order — named-entity classification, the disambiguation choices (the exact options shown, with the pick highlighted), and the generated description. The batch + timestamp of each is in the Provenance table below.

NER Named-entity recognition gpt-5-mini
Instruction
Given a phrase, classify it is english named entity (e.g., persons, organizations, works of art) in Latin script, or not (e.g., literals, dates, URLs, verbose phrases). For disambiguation, the statement where the phrase occurs as object is also given. Please return a JSON object with `phrase` (string, the phrase being analyzed) and `is_ne` (boolean, indicating whether the phrase is a Named Entity).
Input
Phrase: IRS-1 bus | Statement: [IRS-1B, spacecraftBus, IRS-1 bus]
NED1 Entity disambiguation (via context triple) gpt-5-mini-2025-08-07
Target entity: IRS-1 bus
Context triple: [IRS-1B, spacecraftBus, IRS-1 bus]
  • A. ISA bus
    ISA bus is an early IBM PC expansion bus standard that provided a common hardware interface for adding peripheral cards like sound, network, and graphics adapters.
  • B. Multibus
    Multibus is an early Intel-developed computer bus standard widely used in 1980s workstations and embedded systems for modular expansion and peripheral connectivity.
  • C. UNIBUS
    UNIBUS is a pioneering computer bus architecture developed for Digital Equipment Corporation’s PDP series that unified memory and peripheral communications on a single shared system bus.
  • D. Element Interconnect Bus
    The Element Interconnect Bus is a high-speed internal communication network in the Cell Broadband Engine architecture that links its processing elements and memory controllers to enable efficient parallel data transfer.
  • E. S-100 bus computers
    S-100 bus computers are early microcomputer systems built around the S-100 expansion bus standard, widely used in the late 1970s and early 1980s for hobbyist and professional computing.
  • F. None of above. chosen
  • G. Unsure - the case is ambiguous/there is not enough information to decide.
NEDg Description generation gpt-5.1
Instruction
Generate a one-sentence description of the target entity. 
You are given a context triple in the form (subject, predicate, object), where the object is the target entity. 
# Instructions
Use the triple to infer relevant information about the entity. Describe the entity based on what is most defining, well-known. 
Avoid repeating the information from the triple, unless really essential.
# Response Format
Return only the sentence: "Description: [one-sentence description of the target entity]"
Input
Entity: IRS-1 bus
Triple: [IRS-1B, spacecraftBus, IRS-1 bus]
Generated description
The IRS-1 bus is a standardized Indian satellite platform developed for the Indian Remote Sensing (IRS) series, providing the structural, power, and control systems for Earth observation spacecraft.
NED2 Entity disambiguation (via description) gpt-5-mini-2025-08-07
Target entity: IRS-1 bus
Target entity description: The IRS-1 bus is a standardized Indian satellite platform developed for the Indian Remote Sensing (IRS) series, providing the structural, power, and control systems for Earth observation spacecraft.
  • A. ISA bus
    ISA bus is an early IBM PC expansion bus standard that provided a common hardware interface for adding peripheral cards like sound, network, and graphics adapters.
  • B. Multibus
    Multibus is an early Intel-developed computer bus standard widely used in 1980s workstations and embedded systems for modular expansion and peripheral connectivity.
  • C. UNIBUS
    UNIBUS is a pioneering computer bus architecture developed for Digital Equipment Corporation’s PDP series that unified memory and peripheral communications on a single shared system bus.
  • D. Element Interconnect Bus
    The Element Interconnect Bus is a high-speed internal communication network in the Cell Broadband Engine architecture that links its processing elements and memory controllers to enable efficient parallel data transfer.
  • E. S-100 bus computers
    S-100 bus computers are early microcomputer systems built around the S-100 expansion bus standard, widely used in the late 1970s and early 1980s for hobbyist and professional computing.
  • F. None of above. chosen

Provenance (5 batches)

The batch behind each pipeline step, in order, with when it ran. Timestamps are batch-level — stages were processed in waves, so the object chain (NER → NED1 → NEDg → NED2) reads in order, but predicate / elicitation batches can sit in a different wave.

Step Stage Batch ID Status When
creating Elicitation batch_69d6aa8a6a548190a750f944ccdc8064 completed April 8, 2026, 7:20 p.m.
NER Named-entity recognition batch_69d796d760008190930228fa77b61b8b completed April 9, 2026, 12:08 p.m.
NED1 Entity disambiguation (via context triple) batch_69e3453d181081908cb58a957f4d1295 completed April 18, 2026, 8:47 a.m.
NEDg Description generation batch_69e35570b0bc8190a939b0c8e3ce8105 completed April 18, 2026, 9:57 a.m.
NED2 Entity disambiguation (via description) batch_69e359508a388190a16d48a17015e13e completed April 18, 2026, 10:13 a.m.
Created at: April 8, 2026, 9:25 p.m.