ARC 700 family
E846382
The ARC 700 family is a series of configurable 32-bit embedded processor cores from Synopsys’ ARC architecture line, designed for high-performance, low-power system-on-chip applications.
All labels observed (1)
| Label | Occurrences |
|---|---|
| ARC 700 family canonical | 1 |
How this entity was disambiguated
This entity first appeared as the object of triple T10167891 — resolving that mention is where its identity was fixed. The disambiguator weighed these candidate entities and picked the highlighted one (or “None”, minting a new entity). This is how homonymy is resolved: the same surface form can point to different entities.
NED1
Entity disambiguation (via context triple)
gpt-5-mini-2025-08-07
Target entity: ARC 700 family Context triple: [ARC, hasVariant, ARC 700 family]
-
A.
ARC 600 family
The ARC 600 family is a series of configurable 32-bit embedded processor cores from Synopsys’ ARC architecture line, designed for low-power, high-efficiency applications in SoCs.
-
B.
Apollo DN500 series
The Apollo DN500 series was a line of 1980s Apollo Computer workstations known for their advanced graphics and networking capabilities in technical and engineering environments.
-
C.
Q‑Series
Q‑Series is the marketing name used for later models of the De Havilland Canada Dash 8 turboprop airliners that feature advanced cabin noise and vibration reduction technology.
-
D.
X.680 series
The X.680 series is an ITU-T standard that defines Abstract Syntax Notation One (ASN.1), a formal language used to specify data structures for telecommunications and computer networking.
-
E.
Série 4000
Série 4000 is a class of high-speed electric multiple unit trains used by Comboios de Portugal for its Alfa Pendular premium intercity services.
- F. None of above. chosen
- G. Unsure - the case is ambiguous/there is not enough information to decide.
NED2
Entity disambiguation (via description)
gpt-5-mini-2025-08-07
Target entity: ARC 700 family Target entity description: The ARC 700 family is a series of configurable 32-bit embedded processor cores from Synopsys’ ARC architecture line, designed for high-performance, low-power system-on-chip applications.
-
A.
ARC 600 family
The ARC 600 family is a series of configurable 32-bit embedded processor cores from Synopsys’ ARC architecture line, designed for low-power, high-efficiency applications in SoCs.
-
B.
Apollo DN500 series
The Apollo DN500 series was a line of 1980s Apollo Computer workstations known for their advanced graphics and networking capabilities in technical and engineering environments.
-
C.
Q‑Series
Q‑Series is the marketing name used for later models of the De Havilland Canada Dash 8 turboprop airliners that feature advanced cabin noise and vibration reduction technology.
-
D.
X.680 series
The X.680 series is an ITU-T standard that defines Abstract Syntax Notation One (ASN.1), a formal language used to specify data structures for telecommunications and computer networking.
-
E.
Série 4000
Série 4000 is a class of high-speed electric multiple unit trains used by Comboios de Portugal for its Alfa Pendular premium intercity services.
- F. None of above. chosen
Statements (32)
| Predicate | Object |
|---|---|
| instanceOf |
32-bit processor core family
ⓘ
configurable processor architecture ⓘ embedded processor core family ⓘ |
| architecture | ARC NERFINISHED ⓘ |
| belongsToProductLine | Synopsys DesignWare ARC processors NERFINISHED ⓘ |
| designedFor |
embedded systems
ⓘ
system-on-chip applications ⓘ |
| designGoal |
configurability
ⓘ
high performance ⓘ low power consumption ⓘ |
| developer | Synopsys NERFINISHED ⓘ |
| implementation | soft IP core ⓘ |
| intendedFor |
control processing in SoCs
ⓘ
signal processing tasks in embedded systems ⓘ |
| isConfigurable | true ⓘ |
| licensingModel | processor IP licensing ⓘ |
| marketedBy | Synopsys NERFINISHED ⓘ |
| partOf | ARC architecture line NERFINISHED ⓘ |
| performanceClass | high-performance embedded core ⓘ |
| powerEfficiency | low power ⓘ |
| supports |
DSP-oriented instructions
ⓘ
configurable cache options ⓘ embedded real-time operating systems ⓘ hardware dividers ⓘ hardware multipliers ⓘ instruction set extensibility ⓘ |
| targetCustomers | SoC designers ⓘ |
| useCase |
consumer electronics SoCs
ⓘ
industrial control SoCs ⓘ networking SoCs ⓘ storage controllers ⓘ |
| wordLength | 32-bit ⓘ |
How these facts were elicited
The pipeline generated the facts above by prompting gpt-5.1 with this entity's name + description and the instruction below.
Instruction
You are a knowledge base construction expert. Given a subject entity and a description of it, return factual statements that you know for the subject as a JSON list of dictionaries(triples), where keys must be "subject", "predicate" and "object". The number of facts may be very high, between 25 to 50 or more, for very popular subjects. For less popular subjects, the number of facts can be very low, like 5 or 10. # Requirements - If you don't know the subject at all, return an empty list. - If the subject is not a named entity, return an empty list. - Include at least one triple where predicate is "instanceOf". - Do not get too wordy. - Separate several objects into multiple triples with one object.
Input
Subject: ARC 700 family Description of subject: The ARC 700 family is a series of configurable 32-bit embedded processor cores from Synopsys’ ARC architecture line, designed for high-performance, low-power system-on-chip applications.
Referenced by (1)
Full triples — surface form annotated when it differs from this entity's canonical label.