ARC 600 family

E845864

The ARC 600 family is a series of configurable 32-bit embedded processor cores from Synopsys’ ARC architecture line, designed for low-power, high-efficiency applications in SoCs.

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Statements (48)

Predicate Object
instanceOf 32-bit processor core family
configurable processor architecture
embedded processor core family
acquiredBy Synopsys NERFINISHED
architectureFamilyOf ARC 610D NERFINISHED
ARC 620D NERFINISHED
ARC 625D NERFINISHED
ARC 650D NERFINISHED
ARC 670D NERFINISHED
belongsTo ARC processor family NERFINISHED
bitWidth 32-bit
configurability highly configurable
designedFor embedded systems
high-efficiency applications
low-power applications
system-on-chip designs
developer Synopsys NERFINISHED
introducedBy ARC International NERFINISHED
isaFamily ARC ISA NERFINISHED
marketPosition low-power embedded control core
optimizationGoal area efficiency
performance efficiency
partOf Synopsys ARC architecture line NERFINISHED
powerCharacteristic low power consumption
predecessorOf ARC 700 family NERFINISHED
primaryAttribute configurability for SoC integration
low gate count implementation
supports AMBA-based system interfaces
C and C++ programming
Harvard architecture variants
configurable cache options
configurable instruction set
debug features
embedded memory interfaces
interrupt handling
optional DSP-style instructions
optional hardware multipliers
tightly coupled memory
user-defined extensions
targetUseCase control processing in SoCs
cost-sensitive embedded devices
toolchain GCC-based toolchains for ARC
Synopsys MetaWare Development Toolkit NERFINISHED
typicalClockFrequencyRange hundreds of MHz
usedIn automotive SoCs
consumer electronics SoCs
industrial control SoCs
storage controllers

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ARC hasVariant ARC 600 family