KS10
E817472
KS10 is a later, cost-reduced model of Digital Equipment Corporation’s PDP-10 mainframe line, integrating the CPU onto fewer, more modern hardware modules.
Statements (48)
| Predicate | Object |
|---|---|
| instanceOf |
36-bit computer
ⓘ
PDP-10 model ⓘ mainframe computer ⓘ |
| alsoKnownAs |
DEC KS10
NERFINISHED
ⓘ
PDP-10 model KS10 NERFINISHED ⓘ |
| architecture | PDP-10 architecture NERFINISHED ⓘ |
| bitWidth | 36 ⓘ |
| category | minicomputer-class mainframe ⓘ |
| compatibleWith |
PDP-10 instruction set
NERFINISHED
ⓘ
TOPS-10 operating system NERFINISHED ⓘ TOPS-20 operating system NERFINISHED ⓘ |
| cpuImplementation | microprocessor-based CPU ⓘ |
| cpuType | KS10 CPU NERFINISHED ⓘ |
| dataPathWidth | 36 bits ⓘ |
| designCharacteristic |
higher level of integration
ⓘ
implemented with modern LSI components ⓘ lower cost than earlier PDP-10 models ⓘ |
| designGoal | cost-reduced PDP-10 implementation ⓘ |
| era |
early 1980s
ⓘ
late 1970s ⓘ |
| family |
DECSYSTEM-20
NERFINISHED
ⓘ
DECsystem-10 NERFINISHED ⓘ |
| feature |
integrated CPU on fewer hardware modules
ⓘ
microcoded CPU ⓘ microprocessor-based implementation ⓘ |
| generation | later PDP-10 model ⓘ |
| hardwareIntegration | fewer circuit boards than earlier PDP-10 models ⓘ |
| instructionSetArchitecture | PDP-10 ISA NERFINISHED ⓘ |
| manufacturer | Digital Equipment Corporation NERFINISHED ⓘ |
| marketedAs | cost-effective PDP-10 system ⓘ |
| operatingSystem |
TOPS-10
NERFINISHED
ⓘ
TOPS-20 NERFINISHED ⓘ |
| partOfSeries | PDP-10 NERFINISHED ⓘ |
| predecessor |
KA10
ⓘ
KI10 ⓘ KL10 ⓘ |
| supports |
time-sharing multiuser operation
ⓘ
virtual memory (under TOPS-20) ⓘ |
| targetMarket |
commercial data centers
ⓘ
research institutions ⓘ universities ⓘ |
| usedFor |
batch processing
ⓘ
commercial data processing ⓘ scientific computing ⓘ time-sharing ⓘ |
| vendor | DEC NERFINISHED ⓘ |
| wordLength | 36-bit words ⓘ |
| wordSize | 36 bits ⓘ |
Referenced by (1)
Full triples — surface form annotated when it differs from this entity's canonical label.