TSMC 4N
E803291
TSMC 4N is a custom 5 nm-class semiconductor manufacturing process co-developed by TSMC and NVIDIA, optimized specifically for NVIDIA’s latest GPUs to improve performance, power efficiency, and density over previous nodes.
All labels observed (2)
How this entity was disambiguated
This entity first appeared as the object of triple T9506169 — resolving that mention is where its identity was fixed. The disambiguator weighed these candidate entities and picked the highlighted one (or “None”, minting a new entity). This is how homonymy is resolved: the same surface form can point to different entities.
NED1
Entity disambiguation (via context triple)
gpt-5-mini-2025-08-07
Target entity: TSMC 4N Context triple: [NVIDIA Ada Lovelace architecture, processNode, TSMC 4N]
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A.
TSMC N3B
TSMC N3B is an advanced 3-nanometer semiconductor manufacturing process variant developed by TSMC, optimized for high-performance, power-efficient chips used in cutting-edge mobile devices.
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B.
TSMC
TSMC (Taiwan Semiconductor Manufacturing Company) is the world’s largest dedicated semiconductor foundry, renowned for producing cutting-edge chips for major technology companies.
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C.
Taiwan semiconductor cluster
The Taiwan semiconductor cluster is a globally critical concentration of advanced chip design and manufacturing companies, research institutions, and suppliers that forms the backbone of the world’s semiconductor supply chain.
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D.
UMC (United Microelectronics Corporation)
UMC (United Microelectronics Corporation) is a leading Taiwanese semiconductor foundry that manufactures integrated circuits for global electronics and technology companies.
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E.
Asml
Asml is the rail code used to identify Amstelstation in the Dutch railway network.
- F. None of above. chosen
- G. Unsure - the case is ambiguous/there is not enough information to decide.
NED2
Entity disambiguation (via description)
gpt-5-mini-2025-08-07
Target entity: TSMC 4N Target entity description: TSMC 4N is a custom 5 nm-class semiconductor manufacturing process co-developed by TSMC and NVIDIA, optimized specifically for NVIDIA’s latest GPUs to improve performance, power efficiency, and density over previous nodes.
-
A.
TSMC N3B
TSMC N3B is an advanced 3-nanometer semiconductor manufacturing process variant developed by TSMC, optimized for high-performance, power-efficient chips used in cutting-edge mobile devices.
-
B.
TSMC
TSMC (Taiwan Semiconductor Manufacturing Company) is the world’s largest dedicated semiconductor foundry, renowned for producing cutting-edge chips for major technology companies.
-
C.
Taiwan semiconductor cluster
The Taiwan semiconductor cluster is a globally critical concentration of advanced chip design and manufacturing companies, research institutions, and suppliers that forms the backbone of the world’s semiconductor supply chain.
-
D.
UMC (United Microelectronics Corporation)
UMC (United Microelectronics Corporation) is a leading Taiwanese semiconductor foundry that manufactures integrated circuits for global electronics and technology companies.
-
E.
Asml
Asml is the rail code used to identify Amstelstation in the Dutch railway network.
- F. None of above. chosen
Statements (44)
| Predicate | Object |
|---|---|
| instanceOf |
custom foundry process node
ⓘ
semiconductor manufacturing process ⓘ |
| applicationDomain |
artificial intelligence computing
ⓘ
computer graphics ⓘ high-performance computing ⓘ |
| basedOn | TSMC 5 nm family NERFINISHED ⓘ |
| category | TSMC process node ⓘ |
| coDevelopedWith | NVIDIA NERFINISHED ⓘ |
| commercialUse | mass production for NVIDIA GPUs ⓘ |
| comparedTo |
TSMC N5
NERFINISHED
ⓘ
TSMC N6 NERFINISHED ⓘ TSMC N7 NERFINISHED ⓘ |
| designedFor |
improved performance over previous NVIDIA nodes
ⓘ
improved power efficiency over previous NVIDIA nodes ⓘ improved transistor density over previous NVIDIA nodes ⓘ |
| designGoal |
enable larger GPU die sizes
ⓘ
maximize GPU throughput ⓘ reduce power consumption at given performance ⓘ |
| developedBy | TSMC NERFINISHED ⓘ |
| ecosystem | TSMC Open Innovation Platform NERFINISHED ⓘ |
| feature |
custom design rules for NVIDIA
ⓘ
enhanced clock frequency potential ⓘ enhanced power delivery characteristics ⓘ higher performance-per-watt compared to prior NVIDIA nodes ⓘ improved yield for large-area chips ⓘ process tuning for large GPU dies ⓘ |
| foundry | TSMC NERFINISHED ⓘ |
| nodeType | FinFET process ⓘ |
| optimizedFor |
NVIDIA GPUs
NERFINISHED
ⓘ
high-performance graphics processing ⓘ |
| processFamily | TSMC 5 nm-class nodes NERFINISHED ⓘ |
| processGeneration | 5 nm ⓘ |
| relatedTo |
NVIDIA GeForce RTX 40 series
NERFINISHED
ⓘ
NVIDIA data center platforms ⓘ |
| supports |
advanced packaging with TSMC CoWoS
ⓘ
advanced packaging with TSMC InFO ⓘ |
| targetMarket |
AI accelerators
ⓘ
datacenter GPUs ⓘ high-end gaming GPUs ⓘ |
| technologyNodeClass | 5 nm-class ⓘ |
| usedBy | NVIDIA NERFINISHED ⓘ |
| usedIn |
NVIDIA Ada Lovelace architecture GPUs
NERFINISHED
ⓘ
NVIDIA Hopper architecture GPUs NERFINISHED ⓘ |
| waferSize | 300 mm ⓘ |
How these facts were elicited
The pipeline generated the facts above by prompting gpt-5.1 with this entity's name + description and the instruction below.
Instruction
You are a knowledge base construction expert. Given a subject entity and a description of it, return factual statements that you know for the subject as a JSON list of dictionaries(triples), where keys must be "subject", "predicate" and "object". The number of facts may be very high, between 25 to 50 or more, for very popular subjects. For less popular subjects, the number of facts can be very low, like 5 or 10. # Requirements - If you don't know the subject at all, return an empty list. - If the subject is not a named entity, return an empty list. - Include at least one triple where predicate is "instanceOf". - Do not get too wordy. - Separate several objects into multiple triples with one object.
Input
Subject: TSMC 4N Description of subject: TSMC 4N is a custom 5 nm-class semiconductor manufacturing process co-developed by TSMC and NVIDIA, optimized specifically for NVIDIA’s latest GPUs to improve performance, power efficiency, and density over previous nodes.
Referenced by (3)
Full triples — surface form annotated when it differs from this entity's canonical label.
this entity surface form:
TSMC N4
this entity surface form:
TSMC N4