Element Interconnect Bus
E773456
The Element Interconnect Bus is a high-speed internal communication network in the Cell Broadband Engine architecture that links its processing elements and memory controllers to enable efficient parallel data transfer.
Statements (29)
| Predicate | Object |
|---|---|
| instanceOf |
computer bus
ⓘ
on-chip network ⓘ |
| abbreviation | EIB ⓘ |
| architectureType | ring-based interconnect ⓘ |
| associatedWith | heterogeneous multi-core architecture ⓘ |
| bandwidthCharacteristic | very high aggregate bandwidth ⓘ |
| communicationType | synchronous data transfer ⓘ |
| connects |
I/O controllers
ⓘ
Power Processing Element ⓘ Synergistic Processing Elements NERFINISHED ⓘ Synergistic Processing Units NERFINISHED ⓘ memory controllers ⓘ |
| dataTransferMode | packet-based ⓘ |
| designedFor | parallel data transfer ⓘ |
| developedBy | IBM NERFINISHED ⓘ |
| enables |
data transfer between PPE and SPEs
ⓘ
data transfer between SPEs and main memory ⓘ efficient parallel processing ⓘ |
| location | on-chip ⓘ |
| partOf | Cell Broadband Engine NERFINISHED ⓘ |
| purpose | link processing elements and memory controllers ⓘ |
| role | central communication fabric in Cell processor ⓘ |
| scope | intra-processor interconnect ⓘ |
| supports |
high-bandwidth communication
ⓘ
low-latency communication ⓘ |
| topology | bidirectional ring ⓘ |
| usedFor | high-performance computing applications based on Cell ⓘ |
| usedIn |
IBM Cell Broadband Engine implementations
NERFINISHED
ⓘ
Sony PlayStation 3 Cell processor NERFINISHED ⓘ |
Referenced by (1)
Full triples — surface form annotated when it differs from this entity's canonical label.