Cell BE
E773454
heterogeneous multi-core processor
microprocessor architecture
reduced instruction set computing processor
Cell BE is a high-performance microprocessor architecture co-developed by Sony, IBM, and Toshiba, best known for powering the PlayStation 3 and for its use in parallel computing applications.
Statements (53)
| Predicate | Object |
|---|---|
| instanceOf |
heterogeneous multi-core processor
ⓘ
microprocessor architecture ⓘ reduced instruction set computing processor ⓘ |
| alsoKnownAs | Cell Broadband Engine NERFINISHED ⓘ |
| architectureType |
Power Architecture based
ⓘ
heterogeneous computing architecture ⓘ |
| cache | L2 cache on Power Processing Element ⓘ |
| clockSpeed | 3.2 GHz (typical) ⓘ |
| coreCount |
1 Power Processing Element core
ⓘ
7 Synergistic Processing Element cores (typical PS3 configuration) ⓘ 8 Synergistic Processing Element cores (theoretical maximum) ⓘ |
| countryOfOrigin |
Japan
ⓘ
United States of America ⓘ
surface form:
United States
|
| designGoal |
high floating-point performance
ⓘ
low power consumption relative to performance ⓘ media and streaming workloads ⓘ |
| developer |
IBM
ⓘ
Sony NERFINISHED ⓘ Toshiba NERFINISHED ⓘ |
| firstAnnouncementDate | 2001 ⓘ |
| firstCommercialUseDate | 2006 ⓘ |
| firstCommercialUseIn | PlayStation 3 GENERATED ⓘ |
| hasComponent |
Element Interconnect Bus
ⓘ
I/O controller ⓘ Memory Interface Controller ⓘ Power Processing Element NERFINISHED ⓘ Synergistic Processing Element NERFINISHED ⓘ |
| influenced | later heterogeneous CPU-GPU computing models ⓘ |
| instructionSetArchitecture | PowerPC NERFINISHED ⓘ |
| interconnectType | high-bandwidth Element Interconnect Bus NERFINISHED ⓘ |
| manufacturingProcess |
45 nm (some implementations)
ⓘ
65 nm (later versions) ⓘ 90 nm (initial versions) ⓘ |
| memoryModel | local store for each Synergistic Processing Element ⓘ |
| notableFeature |
explicit DMA-based memory transfers
ⓘ
heterogeneous cores with separate local stores ⓘ high peak floating-point throughput ⓘ |
| notableUse |
IBM BladeCenter QS20
NERFINISHED
ⓘ
IBM BladeCenter QS21 NERFINISHED ⓘ IBM BladeCenter QS22 NERFINISHED ⓘ PlayStation 3 NERFINISHED ⓘ Roadrunner supercomputer NERFINISHED ⓘ Toshiba SpursEngine coprocessor NERFINISHED ⓘ |
| purpose |
game console processing
ⓘ
high-performance computing ⓘ |
| supports |
SIMD operations
ⓘ
parallel computing ⓘ vector processing ⓘ |
| usedIn |
media encoding and decoding
ⓘ
scientific computing applications ⓘ signal processing applications ⓘ supercomputing clusters ⓘ |
| wordSize | 64-bit ⓘ |
Referenced by (1)
Full triples — surface form annotated when it differs from this entity's canonical label.