MicroBlaze
E724158
MicroBlaze is a soft 32-bit RISC microprocessor core designed by Xilinx for implementation on its FPGA devices.
All labels observed (1)
| Label | Occurrences |
|---|---|
| MicroBlaze canonical | 2 |
How this entity was disambiguated
This entity first appeared as the object of triple T8285566 — resolving that mention is where its identity was fixed. The disambiguator weighed these candidate entities and picked the highlighted one (or “None”, minting a new entity). This is how homonymy is resolved: the same surface form can point to different entities.
NED1
Entity disambiguation (via context triple)
gpt-5-mini-2025-08-07
Target entity: MicroBlaze Context triple: [QEMU, supportsGuestArchitecture, MicroBlaze]
-
A.
Tensilica Xtensa LX6
Tensilica Xtensa LX6 is a customizable 32-bit RISC processor core widely used in embedded systems for its efficient performance and low power consumption, notably in Espressif’s ESP32 SoCs.
-
B.
QorIQ communications processors
QorIQ communications processors are a family of high-performance, power-efficient multicore system-on-chip devices designed for networking, telecommunications, and embedded communications applications.
-
C.
Cyclone V
Cyclone V is a family of Intel (formerly Altera) mid-range FPGAs designed for cost-effective, low-power programmable logic applications.
-
D.
Crusoe microprocessor
The Crusoe microprocessor is a low-power, x86-compatible CPU line from Transmeta that used code-morphing software to translate x86 instructions to an underlying VLIW architecture, targeting laptops and mobile devices.
-
E.
Cyclone IV
Cyclone IV is a family of low-cost, low-power FPGA devices from Intel (formerly Altera) designed for high-volume, cost-sensitive applications.
- F. None of above. chosen
- G. Unsure - the case is ambiguous/there is not enough information to decide.
NED2
Entity disambiguation (via description)
gpt-5-mini-2025-08-07
Target entity: MicroBlaze Target entity description: MicroBlaze is a soft 32-bit RISC microprocessor core designed by Xilinx for implementation on its FPGA devices.
-
A.
Tensilica Xtensa LX6
Tensilica Xtensa LX6 is a customizable 32-bit RISC processor core widely used in embedded systems for its efficient performance and low power consumption, notably in Espressif’s ESP32 SoCs.
-
B.
QorIQ communications processors
QorIQ communications processors are a family of high-performance, power-efficient multicore system-on-chip devices designed for networking, telecommunications, and embedded communications applications.
-
C.
Cyclone V
Cyclone V is a family of Intel (formerly Altera) mid-range FPGAs designed for cost-effective, low-power programmable logic applications.
-
D.
Crusoe microprocessor
The Crusoe microprocessor is a low-power, x86-compatible CPU line from Transmeta that used code-morphing software to translate x86 instructions to an underlying VLIW architecture, targeting laptops and mobile devices.
-
E.
Cyclone IV
Cyclone IV is a family of low-cost, low-power FPGA devices from Intel (formerly Altera) designed for high-volume, cost-sensitive applications.
- F. None of above. chosen
Statements (52)
| Predicate | Object |
|---|---|
| instanceOf |
32-bit microprocessor core
ⓘ
IP core ⓘ RISC microprocessor core ⓘ soft processor core ⓘ |
| architecture | RISC ⓘ |
| bitWidth | 32-bit ⓘ |
| compatibleWith |
Xilinx 7-series FPGAs
NERFINISHED
ⓘ
Xilinx UltraScale FPGAs NERFINISHED ⓘ Xilinx UltraScale+ FPGAs NERFINISHED ⓘ |
| configurability | highly configurable ⓘ |
| designer | Xilinx NERFINISHED ⓘ |
| developer | Xilinx NERFINISHED ⓘ |
| executionModel | single-issue pipeline ⓘ |
| intendedPlatform | FPGA ⓘ |
| introducedBy | Xilinx NERFINISHED ⓘ |
| marketedAs | MicroBlaze soft processor core NERFINISHED ⓘ |
| registerFile | 32 general-purpose registers ⓘ |
| supports |
AXI interconnect
NERFINISHED
ⓘ
AXI4-Lite NERFINISHED ⓘ AXI4-Stream NERFINISHED ⓘ C programming language NERFINISHED ⓘ C++ programming language NERFINISHED ⓘ GCC NERFINISHED ⓘ GDB NERFINISHED ⓘ GNU toolchain NERFINISHED ⓘ Harvard architecture ⓘ JTAG debug ⓘ MMU ⓘ Vitis NERFINISHED ⓘ Vivado Design Suite NERFINISHED ⓘ Xilinx Platform Studio NERFINISHED ⓘ barrel shifter ⓘ big-endian mode ⓘ cache memory ⓘ data cache ⓘ debug interface ⓘ exceptions ⓘ external memory interfaces ⓘ floating-point unit ⓘ hardware breakpoints ⓘ hardware divider ⓘ hardware multiplier ⓘ instruction cache ⓘ interrupts ⓘ little-endian mode ⓘ on-chip Block RAM ⓘ |
| targetDeviceVendor | Xilinx NERFINISHED ⓘ |
| usedFor |
control applications
ⓘ
embedded systems ⓘ signal processing control ⓘ soft-core CPU implementations ⓘ |
| wordSize | 32 bits ⓘ |
How these facts were elicited
The pipeline generated the facts above by prompting gpt-5.1 with this entity's name + description and the instruction below.
Instruction
You are a knowledge base construction expert. Given a subject entity and a description of it, return factual statements that you know for the subject as a JSON list of dictionaries(triples), where keys must be "subject", "predicate" and "object". The number of facts may be very high, between 25 to 50 or more, for very popular subjects. For less popular subjects, the number of facts can be very low, like 5 or 10. # Requirements - If you don't know the subject at all, return an empty list. - If the subject is not a named entity, return an empty list. - Include at least one triple where predicate is "instanceOf". - Do not get too wordy. - Separate several objects into multiple triples with one object.
Input
Subject: MicroBlaze Description of subject: MicroBlaze is a soft 32-bit RISC microprocessor core designed by Xilinx for implementation on its FPGA devices.
Referenced by (2)
Full triples — surface form annotated when it differs from this entity's canonical label.