PCI bus
E699615
The PCI bus is a widely adopted computer expansion bus standard that provides a high-speed, processor-independent interface for connecting peripheral devices to a motherboard.
All labels observed (2)
Statements (49)
| Predicate | Object |
|---|---|
| instanceOf | computer bus standard ⓘ |
| abbreviation | PCI NERFINISHED ⓘ |
| addressSpace |
32-bit address space
ⓘ
optionally 64-bit address space ⓘ |
| backwardCompatibility | compatible with many legacy operating systems ⓘ |
| category | computer hardware interface standard ⓘ |
| clockFrequency |
33 MHz
ⓘ
66 MHz ⓘ |
| configurationMechanism | configuration space ⓘ |
| configurationSpaceSizePerDevice | 256 bytes in conventional PCI ⓘ |
| connectorType | edge connector ⓘ |
| dataWidth |
32-bit
ⓘ
64-bit ⓘ |
| definedInStandard | PCI Local Bus Specification NERFINISHED ⓘ |
| designedBy | Intel NERFINISHED ⓘ |
| electricalSignaling |
3.3 V
ⓘ
5 V ⓘ |
| firstStandardPublished | 1993 ⓘ |
| fullName | Peripheral Component Interconnect NERFINISHED ⓘ |
| interfaceType | parallel bus ⓘ |
| introducedInYear | 1992 ⓘ |
| keying |
3.3 V key notch
ⓘ
5 V key notch ⓘ universal keying ⓘ |
| maxThroughput |
133 MB/s for 32-bit 33 MHz
ⓘ
266 MB/s for 32-bit 66 MHz ⓘ 533 MB/s for 64-bit 66 MHz ⓘ |
| platformIndependence | processor-independent ⓘ |
| replaced |
ISA bus
NERFINISHED
ⓘ
VESA Local Bus NERFINISHED ⓘ |
| standardizedBy | PCI Special Interest Group NERFINISHED ⓘ |
| supersededBy |
PCI Express
NERFINISHED
ⓘ
PCI-X NERFINISHED ⓘ |
| supports |
I/O port addressing
ⓘ
bus mastering ⓘ interrupt sharing ⓘ memory-mapped I/O ⓘ plug and play ⓘ |
| supportsHotPlug | in some implementations ⓘ |
| topology | shared bus ⓘ |
| usedFor |
connecting peripheral devices to motherboard
ⓘ
graphics cards ⓘ network interface cards ⓘ sound cards ⓘ storage controllers ⓘ |
| version |
PCI 2.0
ⓘ
PCI 2.1 NERFINISHED ⓘ PCI 2.2 NERFINISHED ⓘ PCI 2.3 ⓘ |
Referenced by (3)
Full triples — surface form annotated when it differs from this entity's canonical label.