Unibus

E697041

Unibus is a classic computer bus architecture developed by Digital Equipment Corporation for its PDP-11 minicomputers, enabling communication between the CPU, memory, and peripherals over a single shared pathway.

Try in SPARQL Jump to: Statements Referenced by

Statements (48)

Predicate Object
instanceOf bus architecture
computer bus
addressSpace 128 kilobytes
256 kilowords
addressWidth 18-bit
architectureType shared bus
connects central processing unit
controllers
main memory
peripheral devices
countryOfOrigin United States of America
surface form: United States
dataWidth 16-bit
designGoal unify I/O and memory access on a single bus
developer Digital Equipment Corporation NERFINISHED
era 1970s
late 1960s
hasFeature arbitration logic
bus grant lines
bus request lines
byte and word transfers
master-slave protocol
separate control, address, and data lines
influenced Q-bus NERFINISHED
later DEC bus designs
introducedBy Digital Equipment Corporation NERFINISHED
introducedInProductLine PDP-11 NERFINISHED
manufacturer Digital Equipment Corporation NERFINISHED
marketedAs UNIBUS NERFINISHED
notableFor simplicity of interface for third-party peripherals
unifying memory and I/O on one bus
replacedBy Massbus in some DEC systems
Q-bus NERFINISHED
signalType asynchronous
supports CPU-memory communication
CPU-peripheral communication
direct memory access
interrupts
memory-mapped I/O
memory-peripheral communication
vector interrupts
usedFor minicomputers
usedIn PDP-11 NERFINISHED
PDP-11 minicomputer family NERFINISHED
PDP-11/20 NERFINISHED
PDP-11/45 NERFINISHED
PDP-11/70 NERFINISHED
VAX-11/780 NERFINISHED
early VAX systems

Referenced by (1)

Full triples — surface form annotated when it differs from this entity's canonical label.

PDP-11 hasBusArchitecture Unibus