Naples
E655525
Naples is the first-generation AMD EPYC server processor family based on the Zen microarchitecture, designed for high-core-count, data center, and enterprise workloads.
Statements (53)
| Predicate | Object |
|---|---|
| instanceOf |
AMD EPYC microprocessor family
ⓘ
server processor family ⓘ x86-64 microprocessor ⓘ |
| architecture | 64-bit superscalar ⓘ |
| basedOnMicroarchitecture | Zen NERFINISHED ⓘ |
| brandName | AMD EPYC 7001 series NERFINISHED ⓘ |
| coreCountRange | up to 32 cores per socket ⓘ |
| familyName | EPYC 7001 NERFINISHED ⓘ |
| foundry | GlobalFoundries NERFINISHED ⓘ |
| launchYear | 2017 ⓘ |
| manufacturer |
AMD
NERFINISHED
ⓘ
Advanced Micro Devices NERFINISHED ⓘ |
| marketSegment |
data center
ⓘ
enterprise ⓘ server ⓘ |
| maxPciExpressLanes | 128 ⓘ |
| maxSockets | 2 ⓘ |
| memoryChannelsPerSocket | 8 ⓘ |
| memoryType | DDR4 ⓘ |
| microarchitectureGeneration | Zen 1 NERFINISHED ⓘ |
| processNode | 14 nm ⓘ |
| productFamily | AMD EPYC NERFINISHED ⓘ |
| socket | SP3 ⓘ |
| successor | Rome NERFINISHED ⓘ |
| successorMicroarchitecture | Zen 2 NERFINISHED ⓘ |
| supports |
AES-NI
ⓘ
AMD-V NERFINISHED ⓘ AMD-Vi NERFINISHED ⓘ AMD64 instruction set ⓘ AVX NERFINISHED ⓘ AVX2 ⓘ ECC memory ⓘ FMA3 NERFINISHED ⓘ NX bit ⓘ PCI Express 3.0 NERFINISHED ⓘ SHA extensions ⓘ SMAP NERFINISHED ⓘ SMEP NERFINISHED ⓘ SSE NERFINISHED ⓘ SSE2 NERFINISHED ⓘ SSE3 NERFINISHED ⓘ SSE4.1 NERFINISHED ⓘ SSE4.2 ⓘ SSSE3 ⓘ Secure Encrypted Virtualization ⓘ Secure Memory Encryption ⓘ multi-socket configurations ⓘ x86-64 instruction set ⓘ |
| targetWorkloads |
cloud computing
ⓘ
enterprise databases ⓘ high-performance computing ⓘ virtualization ⓘ |
| threadCountRange | up to 64 threads per socket ⓘ |
Referenced by (1)
Full triples — surface form annotated when it differs from this entity's canonical label.