Nehalem microarchitecture
E653446
Nehalem microarchitecture is Intel’s processor design introduced in 2008 that marked a major shift to integrated memory controllers, QuickPath Interconnect, and advanced performance features for Core i7 and Xeon CPUs.
All labels observed (1)
| Label | Occurrences |
|---|---|
| Nehalem microarchitecture canonical | 1 |
Statements (47)
| Predicate | Object |
|---|---|
| instanceOf | microarchitecture ⓘ |
| architectureFamily | Intel Core family NERFINISHED ⓘ |
| branchPrediction | improved branch predictor over Core ⓘ |
| cacheHierarchy | L1, L2 private per core and shared L3 cache ⓘ |
| codename | Nehalem NERFINISHED ⓘ |
| coreCountRange | 2 to 8 cores ⓘ |
| developer | Intel NERFINISHED ⓘ |
| feature |
QuickPath Interconnect
NERFINISHED
ⓘ
integrated memory controller ⓘ integrated memory controller per CPU die ⓘ large shared L3 cache ⓘ on-die memory controller ⓘ point-to-point interconnect ⓘ power gating ⓘ simultaneous multithreading ⓘ triple-channel DDR3 memory support ⓘ |
| followedBy | Westmere microarchitecture NERFINISHED ⓘ |
| introducedInYear | 2008 ⓘ |
| marketSegment |
desktop processors
ⓘ
server processors ⓘ workstation processors ⓘ |
| memoryTypeSupported | DDR3 SDRAM NERFINISHED ⓘ |
| pipelineDepth | approximately 20–24 stages ⓘ |
| precededBy | Intel Core microarchitecture NERFINISHED ⓘ |
| processTechnology | 45 nm ⓘ |
| replaces | Front Side Bus ⓘ |
| socket |
LGA 1156
ⓘ
LGA 1366 NERFINISHED ⓘ LGA 1567 ⓘ |
| supports |
Hyper-Threading Technology
NERFINISHED
ⓘ
Intel 64 NERFINISHED ⓘ Intel VT-d NERFINISHED ⓘ Intel VT-x NERFINISHED ⓘ SSE4.2 NERFINISHED ⓘ Turbo Boost Technology NERFINISHED ⓘ integrated PCI Express controller in some variants ⓘ x86-64 instruction set ⓘ |
| target |
enterprise servers
ⓘ
enthusiast desktops ⓘ high-performance computing ⓘ |
| usedIn |
Intel Core i7 processors
NERFINISHED
ⓘ
Intel Xeon processors NERFINISHED ⓘ |
| variant |
Beckton
NERFINISHED
ⓘ
Bloomfield NERFINISHED ⓘ Clarksfield NERFINISHED ⓘ Gainestown NERFINISHED ⓘ Lynnfield NERFINISHED ⓘ |
Referenced by (1)
Full triples — surface form annotated when it differs from this entity's canonical label.