XD bit (Execute Disable Bit)
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XD bit (Execute Disable Bit) is a hardware-based security feature in modern processors that helps prevent certain types of malicious code execution by marking specific areas of memory as non-executable.
Observed surface forms (1)
| Surface form | Occurrences |
|---|---|
| XD bit | 0 |
Statements (49)
| Predicate | Object |
|---|---|
| instanceOf |
executable space protection mechanism
ⓘ
hardware-based security feature ⓘ processor feature ⓘ |
| abbreviationOf | Execute Disable Bit ⓘ |
| alsoKnownAs |
EVP
NERFINISHED
ⓘ
Enhanced Virus Protection ⓘ NX bit NERFINISHED ⓘ No-Execute bit ⓘ |
| architecture |
x86
NERFINISHED
ⓘ
x86-64 NERFINISHED ⓘ |
| bitLocation | page table entry ⓘ |
| category |
CPU security feature
ⓘ
memory protection mechanism ⓘ |
| configurableVia |
BIOS settings
ⓘ
UEFI firmware settings ⓘ |
| controls | executability of memory pages ⓘ |
| effect |
causes page fault on disallowed code execution
ⓘ
prevents execution from data-only memory regions ⓘ |
| fullName | Execute Disable Bit NERFINISHED ⓘ |
| helpsMitigate |
code injection attacks
ⓘ
heap-based buffer overflows ⓘ stack-based buffer overflows ⓘ |
| implementedAs | page table attribute bit ⓘ |
| introducedAround | early 2000s ⓘ |
| introducedBy | Intel NERFINISHED ⓘ |
| operatesOn |
memory pages
ⓘ
virtual memory ⓘ |
| purpose |
enforce non-executable memory pages
ⓘ
mitigate buffer overflow attacks ⓘ prevent execution of code from certain memory regions ⓘ support Data Execution Prevention ⓘ |
| relatedTo |
DEP
ⓘ
Data Execution Prevention NERFINISHED ⓘ W^X policy NERFINISHED ⓘ write XOR execute policy ⓘ |
| requires | page-level granularity ⓘ |
| requiresSupportFrom |
operating system
ⓘ
processor ⓘ |
| securityProperty |
enforces non-executable heap
ⓘ
enforces non-executable stack ⓘ |
| standardizedIn |
PAE paging
ⓘ
Physical Address Extension ⓘ |
| usedBy |
AMD processors
NERFINISHED
ⓘ
Intel processors NERFINISHED ⓘ Linux NX support ⓘ Windows Data Execution Prevention NERFINISHED ⓘ macOS memory protection ⓘ some ARM processors ⓘ x86-64 processors ⓘ |
Referenced by (1)
Full triples — surface form annotated when it differs from this entity's canonical label.