10GBASE-R PCS
E495643
10GBASE-R PCS is a physical coding sublayer standard for 10 Gigabit Ethernet that specifies high-speed serial transmission over optical fiber and backplane links.
Observed surface forms (1)
| Surface form | Occurrences |
|---|---|
| 10GBASE-X PCS | 1 |
Statements (46)
| Predicate | Object |
|---|---|
| instanceOf |
10 Gigabit Ethernet standard
ⓘ
Ethernet physical coding sublayer standard ⓘ |
| category | 10 Gigabit Ethernet physical layer technology ⓘ |
| clockRate | 10.3125 Gbaud nominal ⓘ |
| codingScheme | 64b/66b line coding ⓘ |
| compatibleWith | 10GBASE-KR backplane PHY ⓘ |
| definedInStandard | IEEE 802.3 Clause 49 NERFINISHED ⓘ |
| designedFor |
10 Gigabit Ethernet LAN
ⓘ
10 Gigabit Ethernet WAN PHY variants ⓘ |
| encapsulates | XGMII data ⓘ |
| errorDetectionMechanism | alignment marker and block lock monitoring ⓘ |
| firstStandardizedIn | IEEE 802.3ae NERFINISHED ⓘ |
| headerValues | sync headers 01 and 10 ⓘ |
| interoperatesWith |
10GBASE-R PMA sublayer
ⓘ
10GBASE-R PMD sublayer ⓘ |
| layerInOSIModel | physical layer ⓘ |
| lineCodeEfficiency | approximately 97 percent ⓘ |
| mapsTo | 64b/66b encoded blocks ⓘ |
| optimizedFor |
high-speed backplane channels
ⓘ
long-distance optical transmission ⓘ |
| partOf |
10GBASE-R
NERFINISHED
ⓘ
IEEE 802.3 NERFINISHED ⓘ |
| providesFunction |
block synchronization
ⓘ
error detection assistance ⓘ scrambling ⓘ |
| providesInterface | XGMII ⓘ |
| replaces | 8b/10b coding used in earlier Gigabit Ethernet ⓘ |
| roleInStack | maps MAC layer data to physical medium attachment ⓘ |
| scramblerType | self-synchronous scrambler ⓘ |
| standardizedBy | IEEE NERFINISHED ⓘ |
| sublayerOf | Ethernet physical layer NERFINISHED ⓘ |
| supports |
link fault signaling
ⓘ
local and remote fault indication ⓘ |
| supportsAutoNegotiation | no, relies on higher-level mechanisms ⓘ |
| supportsDataRate | 10 Gbit/s ⓘ |
| supportsDuplexMode | full-duplex ⓘ |
| supportsLinkType | point-to-point links ⓘ |
| supportsMedium |
backplane links
ⓘ
optical fiber ⓘ |
| transmissionType | high-speed serial ⓘ |
| usedBy |
10GBASE-ER
NERFINISHED
ⓘ
10GBASE-LR ⓘ 10GBASE-LX4 backplane variants ⓘ 10GBASE-SR ⓘ |
| usesBlockSize | 64-bit payload with 2-bit header ⓘ |
| usesControlBlocks | special 66b control block types ⓘ |
Referenced by (2)
Full triples — surface form annotated when it differs from this entity's canonical label.
this entity surface form:
10GBASE-X PCS